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TPCF8302

更新时间： 2024-11-26 08:40:07
品牌 Logo 应用领域
东芝 - TOSHIBA 晶体晶体管场效应晶体管
页数 文件大小 规格书
7页 273K
描述
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type (U-MOS IV)

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TPCF8302 数据手册

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TPCF8302  
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type (U-MOS IV)  
TPCF8302  
Notebook PC Applications  
Unit: mm  
Portable Equipment Applications  
•
•
•
•
Low drain-source ON resistance: R  
= 44 mΩ (typ.)  
DS (ON)  
High forward transfer admittance: |Y | = 6.2 S (typ.)  
fs  
Low leakage current: I  
= −10 μA (max) (V  
= −20 V)  
DSS  
DS  
Enhancement mode: V = −0.5 to −1.2 V  
th  
(V  
DS  
= −10 V, I = −200 μA)  
D
Absolute Maximum Ratings (Ta = 25°C)  
Characteristics  
Drain-source voltage  
Symbol  
Rating  
Unit  
V
−20  
−20  
±10  
−3.0  
−12  
V
V
V
DSS  
Drain-gate voltage (R  
Gate-source voltage  
= 20 kΩ)  
V
GS  
DGR  
JEDEC  
JEITA  
―
―
V
GSS  
DC  
Pulse  
(Note 1)  
(Note 1)  
I
D
Drain current  
A
I
DP  
TOSHIBA  
2-3U1B  
Single-device operation  
(Note 3a)  
P
1.35  
1.12  
0.53  
0.33  
D (1)  
D (2)  
D (1)  
D (2)  
Weight: 0.011 g (typ.)  
Drain power  
dissipation  
(t = 5 s) (Note 2a)  
Single-device value at  
dual operation (Note 3b)  
P
P
P
Circuit Configuration  
W
Single-device operation  
(Note 3a)  
Drain power  
dissipation  
(t = 5 s) (Note 2b)  
8
7
5
6
Single-device value at  
dual operation (Note 3b)  
Single pulse avalanche energy  
Avalanche current  
(Note 4)  
E
0.58  
mJ  
A
AS  
I
−1.5  
AR  
Repetitive avalanche energy  
Single-device value at dual operation  
E
0.11  
mJ  
AR  
(Note 2a, 3b, 5)  
1
2
4
3
Channel temperature  
T
150  
°C  
°C  
ch  
Storage temperature range  
T
stg  
−55~150  
Note: (Note 1), (Note 2), (Note 3), (Note 4), (Note 5) and (Note 6): See the next page.  
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate  
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and  
Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).  
This transistor is an electrostatic-sensitive device. Please handle with caution.  
1
2006-11-16  
1234567

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