Datasheet > TP3406V

TP3406V

更新时间： 2024-11-25 22:42:03

品牌	Logo	应用领域
美国国家半导体 - NSC		电信集成电路综合业务数字网
页数	文件大小	规格书
16页	236K
描述
DASL Digital Adapter for Subscriber Loops

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中文翻译

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TP3406V 数据手册

November 1992

TP3406

DASL Digital Adapter for Subscriber Loops

General Description

The TP3406 is a complete monolithic transceiver for data

transmission on twisted pair subscriber loops. It is built on

National’s double poly microCMOS process, and requires

Features

Complete ISDN PBX 2-Wire Data Transceiver including:

2 B plus D channel interface for PBX U Interface

144 kb/s full-duplex on 1 twisted pair using Burst Mode

only a single 5 Volt supply. Alternate Mark Inversion (AMI)

Loop range up to 800 meters ( 24AWG)

line coding, in which binary ‘1’s are alternately transmitted

as a positive pulse then a negative pulse, is used to ensure

low error rates in the presence of noise with lower emi radia-

tion than other codes such as Bi-phase (Manchester).

Alternate Mark Inversion coding with transmit filter and

scrambler for low emi radiation

Adaptive line equalizer

On-chip timing recovery, no external components

Standard TDM interface for B channels

Separate interface for D channel

2.048 MHz master clock

Full-duplex transmission at 144 kb/s is achieved on a single

twisted wire pair using a burst-mode technique (Time Com-

pression Multiplexed). Thus the device operates as an ISDN

‘U’ Interface for short loop applications, typically in a PBX

environment, providing transmission for 2 B channels and 1

Driver for line transformer

D channel. On 24 cable, the range is up to 800 meters.

4 loop-back test modes

Single 5V supply

MICROWIRE^TMcompatible serial control interface

System timing is based on a Master/Slave configuration,

with the line card end being the Master which controls loop

timing and synchronisation. All timing sequences necessary

for loop activation and de-activation are generated on-chip.

Applications in:

PBX Line Cards

Terminals

Regenerators

Selection of Master and Slave mode operation is pro-

grammed via the Microwire Control Interface.

Available in 28-pin PLCC Package

A 2.048 MHz clock, which may be synchronized to the sys-

tem clock, controls all transmission-related timing functions.

Block Diagram

TL/H/11725–1

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation

MICROWIRE^TMis a trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/H/11725

RRD-B30M115/Printed in U. S. A.

12 3 4 5 6 7...16

中文翻译

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与TP3406V相关器件

型号	品牌	获取价格	描述	数据表
TP3410	PULSE	获取价格	TELECOMMUNICATIONS PRODUCTS
TP3410	NSC	获取价格	TP3410 ISDN Basic Access Echo-Cancelling 2B1Q U Transceiver
TP3410J	NSC	获取价格	TP3410 ISDN Basic Access Echo-Cancelling 2B1Q U Transceiver
TP3410J304	ETC	获取价格	IC-ISDN TRANSCEIVER
TP3410V	TI	获取价格	SPECIALTY TELECOM CIRCUIT, PQCC28, PLASTIC, LCC-28
TP3410WG304	TI	获取价格	DATACOM, DIGITAL SLIC, CDSO28
TP3420	TI	获取价格	SPECIALTY TELECOM CIRCUIT, PDIP24, SKINNY, DIP-24
TP3420A	NSC	获取价格	ISDN S/T Interface Device
TP3420AJ	NSC	获取价格	ISDN S/T Interface Device
TP3420AN	NSC	获取价格	ISDN S/T Interface Device

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