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TP3067BDWR

更新时间： 2024-09-15 13:14:51
品牌 Logo 应用领域
德州仪器 - TI 解码器过滤器编解码器LTEPC
页数 文件大小 规格书
20页 284K
描述
A-LAW, PCM CODEC, PDSO20

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中文翻译

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TP3067BDWR 技术参数

是否Rohs认证：符合生命周期：Obsolete
包装说明：SOP, SOP20,.4Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.59
Is Samacsys：N其他特性：FULL DUPLEX
压伸定律：A-LAW滤波器：YES
最大增益公差：0.15 dBJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：12.8 mm
线性编码：NOT AVAILABLE湿度敏感等级：1
负电源额定电压：-5 V功能数量：1
端子数量：20工作模式：SYNCHRONOUS/ASYNCHRONOUS
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：+-5 V认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Codecs
最大压摆率：10 mA标称供电电压：5 V
表面贴装：YES技术：CMOS
电信集成电路类型：PCM CODEC温度等级：COMMERCIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
Base Number Matches：1

TP3067BDWR 数据手册

 浏览型号TP3067BDWR的Datasheet PDF文件第2页浏览型号TP3067BDWR的Datasheet PDF文件第3页浏览型号TP3067BDWR的Datasheet PDF文件第4页浏览型号TP3067BDWR的Datasheet PDF文件第5页浏览型号TP3067BDWR的Datasheet PDF文件第6页浏览型号TP3067BDWR的Datasheet PDF文件第7页 
TP3064A, TP3067A, TP13064A, TP13067A  
MONOLITHIC SERIAL INTERFACE  
COMBINED PCM CODEC AND FILTER  
SCTS025C – SEPTEMBER 1992 –REVISED JULY 1996  
Complete PCM Codec and Filtering  
Systems Include:  
– Transmit High-Pass and Low-Pass  
Filtering  
µ-Law – TP3064B and TP13064B  
A-Law – TP3067B and TP13067B  
±5-V Operation  
Low Operating Power . . . 70 mW Typ  
Power-Down Standby Mode . . . 3 mW Typ  
Automatic Power Down  
– Receive Low-Pass Filter With (sin x)/x  
Correction  
– Active RC Noise Filters  
– µ-Law or A-Law Compatible Coder and  
Decoder  
TTL- or CMOS-Compatible Digital Interface  
Maximizes Line Interface Card Circuit  
Density  
– Internal Precision Voltage Reference  
– Serial I/O Interface  
Improved Versions of National  
Semiconductor TP3064, TP3067, TP3064-X,  
TP3067-X  
– Internal Autozero Circuitry  
description  
DW OR N PACKAGE  
(TOP VIEW)  
The TP3064A, TP3067A, TP13064A, and  
TP13067A are comprised of a single-chip PCM  
codec (pulse-code-modulated encoder and de-  
coder) and PCM line filter. These devices provide  
all the functions required to interface a full-duplex  
(2-wire) voice telephone circuit with a TDM  
(time-division-multiplexed) system. These de-  
vices are pin-for-pin compatible with the National  
Semiconductor TP3064A and TP3067A, respec-  
tively. Primary applications include:  
VPO+  
ANLG GND  
VPO–  
V
BB  
VFXI+  
VFXI–  
GSX  
ANLG LOOP  
TSX  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
VPI  
VFRO  
V
CC  
FSR  
DR  
14 FSX  
13 DX  
12 BCLKX  
11 MCLKX  
BCLKR/CLKSEL  
•
Line interface for digital transmission and  
switching of T1 carrier, PABX, and central  
office telephone systems  
MCLKR/PDN 10  
•
•
•
•
Subscriber line concentrators  
Digital-encryption systems  
Digital voice-band data-storage systems  
Digital signal processing  
These devices are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A  
conversion) as well as the transmit and receive filtering functions in a PCM system. They are intended to be  
used at the analog termination of a PCM line or trunk. The devices require two transmit and receive master  
clocks that may be asynchronous (1.536 MHz, 1.544 MHz, or 2.048 MHz), transmit and receive data clocks that  
are synchronous with the master clock (but can vary from 64 kHz to 2.048 MHz), and transmit and receive  
frame-sync pulses. The TP3064A, TP3067A, TP13064A, and TP13067A provide the band-pass filtering of the  
analog signals prior to encoding and after decoding of voice and call progress tones. The TP3067A and  
TP13067A contain patented circuitry to achieve low transmit channel idle noise and are not recommended for  
applications in which the composite signals on the transmit side are below –55 dBm0.  
The TP3064A and TP3067A are characterized for operation from 0°C to 70°C. The TP13064A and TP13067A  
are characterized for operation from –40°C to 85°C.  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the CMOS gates.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...20

中文翻译

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TP3067BDWR 替代型号

型号 品牌 替代类型 描述 数据表
TP3067ADW TI

类似代替

 MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
TP3067BDW TI

功能相似

 MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER

与TP3067BDWR相关器件

型号 品牌 获取价格 描述 数据表
TP3067BFN TI

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 		暂无描述
TP3067BFNR TI

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 		A-LAW, PCM CODEC, PQCC20
TP3067BJ TI

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 		A-LAW, PCM CODEC, CDIP20
TP3067BN TI

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 		MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
TP3067J NSC

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 		``Enhanced' Serial Interface CMOS CODEC/Filter COMBO
TP3067N NSC

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 		``Enhanced' Serial Interface CMOS CODEC/Filter COMBO
TP3067N/NOPB NSC

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 		IC A-LAW, PCM CODEC, PDIP20, PLASTIC, DIP-20, Codec
TP3067N/NOPB ROCHESTER

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 		A-LAW, PCM CODEC, PDIP20, PLASTIC, DIP-20
TP3067N/NOPB TI

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 		Enhanced Serial Interface CMOS CODEC/Filter COMBO 20-PDIP
TP3067V NSC

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 		``Enhanced' Serial Interface CMOS CODEC/Filter COMBO

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