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TP2522N8-G PDF预览

TP2522N8-G

更新时间: 2024-11-23 03:26:51
品牌 Logo 应用领域
超科 - SUPERTEX 晶体晶体管功率场效应晶体管开关脉冲
页数 文件大小 规格书
5页 572K
描述
P-Channel Enhancement Mode Vertical DMOS FETs

TP2522N8-G 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Transferred零件包装代码:SOT-89
包装说明:SMALL OUTLINE, R-PSSO-F3针数:3
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.29.00.75风险等级:5.31
Is Samacsys:N其他特性:LOW THRESHOLD, LOGIC LEVEL COMPATIBLE
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:220 V最大漏极电流 (ID):0.26 A
最大漏源导通电阻:12 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码:TO-243AAJESD-30 代码:R-PSSO-F3
JESD-609代码:e3湿度敏感等级:1
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:P-CHANNEL
最大脉冲漏极电流 (IDM):2 A认证状态:Not Qualified
表面贴装:YES端子面层:Matte Tin (Sn)
端子形式:FLAT端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

TP2522N8-G 数据手册

 浏览型号TP2522N8-G的Datasheet PDF文件第2页浏览型号TP2522N8-G的Datasheet PDF文件第3页浏览型号TP2522N8-G的Datasheet PDF文件第4页浏览型号TP2522N8-G的Datasheet PDF文件第5页 
TP2522  
P-Channel Enhancement Mode  
Vertical DMOS FETs  
Features  
General Description  
This low threshold enhancement-mode (normally-off)  
transistorutilizesaverticalDMOSstructureandSupertex’s  
well-proven silicon-gate manufacturing process. This  
combination produces a device with the power handling  
capabilities of bipolar transistors and with the high input  
impedance and positive temperature coefficient inherent  
in MOS devices. Characteristic of all MOS structures,  
this device is free from thermal runaway and thermally-  
induced secondary breakdown.  
Low threshold — -2.4V max.  
High input impedance  
Low input capacitance — 125pF max.  
Fast switching speeds  
Low ON-resistance  
Free from secondary breakdown  
Low input and output leakage  
Complementary N and P-channel devices  
Applications  
Logic level interfaces – ideal for TTL and CMOS  
Solid state relays  
Battery operated systems  
Photo voltaic drives  
Supertex’s vertical DMOS FETs are ideally suited to a wide  
range of switching and amplifying applications where very  
low threshold voltage, high breakdown voltage, high input  
impedance, low input capacitance, and fast switching  
speeds are desired.  
Analog switches  
General purpose line drivers  
Telecom switches  
Ordering Information  
RDS(ON)  
VGS(th)  
max  
(V)  
ID(ON)  
min  
(A)  
Package Options  
BVDSS/BVDGS  
max  
(V)  
TO-243AA (SOT-89)  
Die*  
(Ω)  
-22ꢀ  
12  
-2.4  
-ꢀ.75  
TP2522N8-G  
TP2522ND  
-G indicates package is RoHS compliant (‘Green’)  
* MIL visual screening available.  
Pin Configuration  
DRAIN  
SOURCE  
Absolute Maximum Ratings  
DRAIN  
GATE  
Parameter  
Value  
BVDSS  
TO-243AA (SOT-89) (N8)  
Drain-to-source voltage  
Drain-to-gate voltage  
Gate-to-source voltage  
Operating and storage temperature  
Soldering temperature*  
Absolute Maximum Ratings are those values beyond which damage to  
the device may occur. Functional operation under these conditions is not  
implied. Continuous operation of the device at the absolute rating level  
may affect device reliability. All voltages are referenced to device ground.  
BVDGS  
2ꢀV  
Product Marking  
-55°C to +15ꢀ°C  
3ꢀꢀ°C  
TP5CW  
W = Code for week sealed  
TO-243AA (SOT-89) (N8)  
* Distance of 1.6 mm from case for 10 seconds.  

TP2522N8-G 替代型号

型号 品牌 替代类型 描述 数据表
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