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TP2522N8 PDF预览

TP2522N8

更新时间： 2024-09-30 22:35:35
品牌 Logo 应用领域
超科 - SUPERTEX 晶体晶体管功率场效应晶体管开关脉冲
页数 文件大小 规格书
4页 457K
描述
P-Channel Enhancement-Mode Vertical DMOS FETs

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中文翻译

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TP2522N8 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：SOT-89
包装说明：SMALL OUTLINE, R-PSSO-F3针数：3
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8541.29.00.75风险等级：5.31
Is Samacsys：N其他特性：LOGIC LEVEL COMPATIBLE
外壳连接：DRAIN配置：SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：220 V最大漏极电流 (ID)：0.26 A
最大漏源导通电阻：12 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码：TO-243AAJESD-30 代码：R-PSSO-F3
JESD-609代码：e0元件数量：1
端子数量：3工作模式：ENHANCEMENT MODE
最高工作温度：150 °C封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：P-CHANNEL
最大功率耗散 (Abs)：1.6 W最大脉冲漏极电流 (IDM)：2 A
认证状态：Not Qualified子类别：Other Transistors
表面贴装：YES端子面层：Tin/Lead (Sn/Pb)
端子形式：FLAT端子位置：SINGLE
处于峰值回流温度下的最长时间：NOT SPECIFIED晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

TP2522N8 数据手册

 浏览型号TP2522N8的Datasheet PDF文件第2页浏览型号TP2522N8的Datasheet PDF文件第3页浏览型号TP2522N8的Datasheet PDF文件第4页 
TP2520  
TP2522  
Low Threshold  
P-Channel Enhancement-Mode  
Vertical DMOS FETs  
Ordering Information  
Order Number / Package  
BVDSS  
/
RDS(ON)  
(max)  
VGS(th)  
(max)  
ID(ON)  
(min)  
BVDGS  
-200V  
-220V  
TO-243AA*  
TP2520N8  
TP2522N8  
Die†  
12Ω  
12Ω  
-2.4V  
-2.4V  
-0.75A  
-0.75A  
—
TP2522ND  
* Same as SOT-89. Product supplied on 2000 piece carrier tape reels.  
† MIL visual screening available.  
Product marking for TO-243AA  
Features  
TP5C❋  
Where❋=2-weekalphadatecode  
❏
❏
❏
❏
❏
❏
❏
❏
Low threshold — -2.4V max.  
High input impedance  
Low input capacitance — 125pF max.  
Fast switching speeds  
Low Threshold DMOS Technology  
Low on resistance  
These low threshold enhancement-mode (normally-off) transis-  
torsutilizeaverticalDMOSstructureandSupertex'swell-proven  
silicon-gate manufacturing process. This combination produces  
devices with the power handling capabilities of bipolar transis-  
tors and with the high input impedance and positive temperature  
coefficient inherent in MOS devices. Characteristic of all MOS  
structures, these devices are free from thermal runaway and  
thermally-induced secondary breakdown.  
Free from secondary breakdown  
Low input and output leakage  
Complementary N- and P-channel devices  
Applications  
Supertex’s vertical DMOS FETs are ideally suited to a wide range  
of switching and amplifying applications where very low threshold  
voltage, highbreakdownvoltage, highinputimpedance, lowinput  
capacitance, and fast switching speeds are desired.  
❏
❏
❏
❏
❏
❏
❏
Logic level interfaces – ideal for TTL and CMOS  
Solid state relays  
Battery operated systems  
Photo voltaic drives  
Package Option  
Analog switches  
General purpose line drivers  
Telecom switches  
D
G
D
S
Absolute Maximum Ratings  
Drain-to-Source Voltage  
Drain-to-Gate Voltage  
Gate-to-Source Voltage  
BVDSS  
BVDGS  
± 20V  
TO-243AA  
(SOT-89)  
Operating and Storage Temperature  
Soldering Temperature*  
-55°C to +150°C  
300°C  
Note: See Package Outline section for dimensions.  
* Distance of 1.6 mm from case for 10 seconds.  
11/12/01  
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability  
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to  
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the  
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.  
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中文翻译

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TP2522N8 替代型号

型号 品牌 替代类型 描述 数据表
TP2522N8-G SUPERTEX

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