Datasheet > TP2522_07

TP2522_07

更新时间： 2024-11-19 03:26:51

品牌	Logo	应用领域
超科 - SUPERTEX		/
页数	文件大小	规格书
5页	572K
描述
P-Channel Enhancement Mode Vertical DMOS FETs

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中文翻译

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TP2522_07 数据手册

TP2522

P-Channel Enhancement Mode

Vertical DMOS FETs

Features

General Description

This low threshold enhancement-mode (normally-off)

transistorutilizesaverticalDMOSstructureandSupertex’s

well-proven silicon-gate manufacturing process. This

combination produces a device with the power handling

capabilities of bipolar transistors and with the high input

impedance and positive temperature coefﬁcient inherent

in MOS devices. Characteristic of all MOS structures,

this device is free from thermal runaway and thermally-

induced secondary breakdown.

► Low threshold — -2.4V max.

► High input impedance

► Low input capacitance — 125pF max.

► Fast switching speeds

► Low ON-resistance

► Free from secondary breakdown

► Low input and output leakage

► Complementary N and P-channel devices

Applications

► Logic level interfaces – ideal for TTL and CMOS

► Solid state relays

► Battery operated systems

► Photo voltaic drives

Supertex’s vertical DMOS FETs are ideally suited to a wide

range of switching and amplifying applications where very

low threshold voltage, high breakdown voltage, high input

impedance, low input capacitance, and fast switching

speeds are desired.

► Analog switches

► General purpose line drivers

► Telecom switches

Ordering Information

R_DS(ON)

V_GS(th)

max

(V)

I_D(ON)

min

(A)

Package Options

BV_DSS/BV_DGS

max

(V)

TO-243AA (SOT-89)

Die*

(Ω)

-22ꢀ

-2.4

-ꢀ.75

TP2522N8-G

TP2522ND

-G indicates package is RoHS compliant (‘Green’)

* MIL visual screening available.

Pin Conﬁguration

DRAIN

SOURCE

Absolute Maximum Ratings

DRAIN

GATE

Parameter

Value

BV_DSS

TO-243AA (SOT-89) (N8)

Drain-to-source voltage

Drain-to-gate voltage

Gate-to-source voltage

Operating and storage temperature

Soldering temperature*

Absolute Maximum Ratings are those values beyond which damage to

the device may occur. Functional operation under these conditions is not

implied. Continuous operation of the device at the absolute rating level

may affect device reliability. All voltages are referenced to device ground.

BV_DGS

2ꢀV

Product Marking

-55°C to +15ꢀ°C

3ꢀꢀ°C

TP5CW

W = Code for week sealed

TO-243AA (SOT-89) (N8)

* Distance of 1.6 mm from case for 10 seconds.

12 3 4 5

中文翻译

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与TP2522_07相关器件

型号	品牌	获取价格	描述	数据表
TP2522N8	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FETs
TP2522N8-G	SUPERTEX	获取价格	P-Channel Enhancement Mode Vertical DMOS FETs
TP2522ND	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FETs
TP2535	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FETs
TP2535	MICROCHIP	获取价格	This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS st
TP2535N3	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FETs
TP2535N3-G	SUPERTEX	获取价格	Small Signal Field-Effect Transistor, 0.086A I(D), 350V, 1-Element, P-Channel, Silicon, Me
TP2535N3-G	MICROCHIP	获取价格	86mA, 350V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, TO-92
TP2535N3-GP002	MICROCHIP	获取价格	SMALL SIGNAL, FET
TP2535N3-GP003	MICROCHIP	获取价格	Small Signal Field-Effect Transistor,

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