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TP2510N8-G PDF预览

TP2510N8-G

更新时间: 2024-11-19 02:52:23
品牌 Logo 应用领域
超科 - SUPERTEX /
页数 文件大小 规格书
5页 549K
描述
Low Threshold P-Channel Enhancement Mode Vertical DMOS FETs

TP2510N8-G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOT-89
包装说明:SMALL OUTLINE, R-PSSO-F3针数:3
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.29.00.75风险等级:7.92
其他特性:LOGIC LEVEL COMPATIBLE, LOW THRESHOLD外壳连接:DRAIN
配置:SINGLE最小漏源击穿电压:100 V
最大漏极电流 (Abs) (ID):0.48 A最大漏极电流 (ID):0.48 A
最大漏源导通电阻:3.5 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss):25 pFJEDEC-95代码:TO-243AA
JESD-30 代码:R-PSSO-F3JESD-609代码:e3
湿度敏感等级:1元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:P-CHANNEL
最大功率耗散 (Abs):1.6 W最大脉冲漏极电流 (IDM):2.5 A
认证状态:Not Qualified子类别:Other Transistors
表面贴装:YES端子面层:Matte Tin (Sn)
端子形式:FLAT端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICON最大关闭时间(toff):35 ns
最大开启时间(吨):25 nsBase Number Matches:1

TP2510N8-G 数据手册

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TP2510  
Low Threshold  
P-Channel Enhancement Mode  
Vertical DMOS FETs  
Features  
General Description  
Low threshold — -2.4V max.  
High input impedance  
Low input capacitance — 125pF max.  
Fast switching speeds  
These low threshold enhancement-mode (normally-off) tran-  
sistors utilize a vertical DMOS structure and Supertex’s well-  
proven silicon-gate manufacturing process. This combination  
produces devices with the power handling capabilities of bipolar  
transistors and with the high input impedance and positive  
temperature coefficient inherent in MOS devices. Characteristic  
of all MOS structures, these devices are free from thermal  
runaway and thermally-induced secondary breakdown.  
Low on resistance  
Free from secondary breakdown  
Low input and output leakage  
Complementary N and P-channel devices  
Supertex’s vertical DMOS FETs are ideally suited to a  
widerange of switching and amplifying applications where  
very low threshold voltage, high breakdown voltage, high input  
impedance, low input capacitance, and fast switching speeds  
are desired.  
Applications  
Logic level interfaces — ideal for TTL and CMOS  
Solid state relays  
Battery operated systems  
Photo voltaic drives  
Analog switches  
General purpose line drivers  
Telecom switches  
Switching Waveforms and Test Circuit  
0V  
PULSE  
GENERATOR  
10%  
INPUT  
RGEN  
-10V  
90%  
t(OFF)  
t(ON)  
td(ON)  
D.U.T.  
td(OFF)  
tF  
tr  
Output  
0V  
INPUT  
90%  
90%  
RL  
OUTPUT  
10%  
10%  
VDD  
VDD  
Thermal Characteristics  
ID  
ID  
Power Dissipation  
@ TA = 25OC  
(W)  
IDRM  
(A)  
θjc  
θjc  
IDR  
Package  
continuous†  
pulsed  
(OC/W)  
(OC/W)  
(mA)  
(mA)  
(A)  
TO-243AA  
-480  
-2.5  
1.6‡  
15  
78‡  
-480  
-2.5  
† ID (continuous) is limited by max rated T.  
‡ Mounted on FR5 board, 25mm x 25mmjx 1.57mm.  

TP2510N8-G 替代型号

型号 品牌 替代类型 描述 数据表
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