Datasheet > TP2510_07

TP2510_07

更新时间： 2024-11-19 03:26:51

品牌	Logo	应用领域
超科 - SUPERTEX		/
页数	文件大小	规格书
5页	549K
描述
Low Threshold P-Channel Enhancement Mode Vertical DMOS FETs

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TP2510_07 数据手册

TP2510

Low Threshold

P-Channel Enhancement Mode

Vertical DMOS FETs

Features

General Description

► Low threshold — -2.4V max.

► High input impedance

► Low input capacitance — 125pF max.

► Fast switching speeds

These low threshold enhancement-mode (normally-off) tran-

sistors utilize a vertical DMOS structure and Supertex’s well-

proven silicon-gate manufacturing process. This combination

produces devices with the power handling capabilities of bipolar

transistors and with the high input impedance and positive

temperature coefﬁcient inherent in MOS devices. Characteristic

of all MOS structures, these devices are free from thermal

runaway and thermally-induced secondary breakdown.

► Low on resistance

► Free from secondary breakdown

► Low input and output leakage

► Complementary N and P-channel devices

Supertex’s vertical DMOS FETs are ideally suited to a

widerange of switching and amplifying applications where

very low threshold voltage, high breakdown voltage, high input

impedance, low input capacitance, and fast switching speeds

are desired.

Applications

► Logic level interfaces — ideal for TTL and CMOS

► Solid state relays

► Battery operated systems

► Photo voltaic drives

► Analog switches

► General purpose line drivers

► Telecom switches

Switching Waveforms and Test Circuit

PULSE

GENERATOR

10%

INPUT

R_GEN

-10V

90%

t_(OFF)

t_(ON)

t_d(ON)

D.U.T.

t_d(OFF)

t_F

t_r

Output

INPUT

90%

R_L

OUTPUT

10%

V_DD

Thermal Characteristics

I_D

Power Dissipation

@ T_A= 25^OC

(W)

I_DRM

(A)

θ_jc

I_DR

†

Package

continuous†

pulsed

(^OC/W)

(mA)

(A)

TO-243AA

-480

-2.5

1.6‡

78‡

-480

-2.5

† I_D(continuous) is limited by max rated T.

‡ Mounted on FR5 board, 25mm x 25mm^jx 1.57mm.

12 3 4 5

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