TP13064B

更新时间： 2024-01-25 10:49:42

品牌	Logo	应用领域
德州仪器 - TI		解码器过滤器编解码器 LTE PC
页数	文件大小	规格书
21页	301K
描述
MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER

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TP13064B 数据手册

TP3064B, TP3067B, TP13064B, TP13067B

MONOLITHIC SERIAL INTERFACE

COMBINED PCM CODEC AND FILTER

SCTS031D – MAY 1990 –REVISED JULY 1996

Complete PCM Codec and Filtering

Systems Include:

– Transmit High-Pass and Low-Pass

Filtering

µ-Law – TP13064B and TP3064B

A-Law – TP13067B and TP3067B

±5-V Operation

Low Operating Power . . . 70 mW Typ

Power-Down Standby Mode . . . 3 mW Typ

Automatic Power Down

– Receive Low-Pass Filter With (sin x)/x

Correction

– Active RC Noise Filters

– µ-Law or A-Law Compatible Coder and

Decoder

TTL- or CMOS-Compatible Digital Interface

Maximizes Line Interface Card Circuit

Density

– Internal Precision Voltage Reference

– Serial I/O Interface

Improved Versions of National

Semiconductor TP3064, TP3067, TP3064-X,

and TP3067-X

– Internal Autozero Circuitry

description

DW OR N PACKAGE

(TOP VIEW)

The TP3064B, TP3067B, TP13064B, and

TP13067B each comprise a single-chip pulse-

code-modulation encoder and decoder (PCM

codec), and PCM line filter. They also provide

band-pass filtering of the analog signals prior to

the encoding, and low-pass filtering after the

decodingofvoicesignalsandcall-progresstones.

All the functions required to interface a full-duplex

(2-wire) voice telephone circuit with a time-divi-

sion-multiplexed (TDM) system are included

on-chip. These devices are pin-for-pin compatible

with the National Semiconductor TP3064 and

TP3067. Primary applications include:

VPO+

ANLG GND

VPO–

VFXI+

VFXI–

GSX

ANLG LOOP

TSX

VPI

VFRO

FSR

14 FSX

13 DX

12 BCLKX

11 MCLKX

BCLKR/CLKSEL

MCLKR/PDN 10

•

Line interface for digital transmission and

switching of T1 carrier, PABX (private

automated branch exchange), and central

office telephone systems

•

Subscriber line concentrators

Digital-encryption systems

Digital voice-band data-storage systems

Digital signal processing

These devices are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A

conversion) as well as the transmit and receive filtering functions in a PCM system, and are intended to be used

at the analog termination of a PCM line or trunk. They require a transmit master clock and a receive master clock

that may be asynchronous (1.536 MHz, 1.544 MHz, or 2.048 MHz), transmit and receive data clocks that are

synchronous with the master clock (but can vary from 64 kHz to 2.048 MHz), and transmit and receive

frame-sync pulses. The TP3064B and TP13064B contain patented circuitry to achieve low transmit channel

idle noise and are not recommended for applications in which the composite signals on the transmit side are

below –55 dBm0.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the CMOS gates.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...21

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与TP13064B相关器件

型号	品牌	获取价格	描述	数据表
TP13064BDW	TI	获取价格	MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
TP13064BDW	ROCHESTER	获取价格	MU-LAW, PCM CODEC, PDSO20
TP13064BFN	TI	获取价格	MU-LAW, PCM CODEC, PQCC20
TP13064BFNR	TI	获取价格	MU-LAW, PCM CODEC, PQCC20
TP13064BJ	TI	获取价格	MU-LAW, PCM CODEC, CDIP20
TP13064BN	TI	获取价格	MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
TP13067A	TI	获取价格	MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
TP13067ADW	TI	获取价格	MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
TP13067ADWR	TI	获取价格	暂无描述
TP13067AJ	ETC	获取价格	A-Law CODEC

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