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TN0624N3 PDF预览

TN0624N3

更新时间： 2024-01-01 17:59:08
品牌 Logo 应用领域
超科 - SUPERTEX 开关晶体管
页数 文件大小 规格书
4页 32K
描述
Small Signal Field-Effect Transistor, 0.4A I(D), 240V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-92

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TN0624N3 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：CYLINDRICAL, O-PBCY-W3Reach Compliance Code：unknown
ECCN代码：EAR99风险等级：5.92
其他特性：LOW THRESHOLD配置：SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：240 V最大漏极电流 (Abs) (ID)：0.4 A
最大漏极电流 (ID)：0.4 A最大漏源导通电阻：6 Ω
FET 技术：METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss)：35 pF
JEDEC-95代码：TO-92JESD-30 代码：O-PBCY-W3
JESD-609代码：e0元件数量：1
端子数量：3工作模式：ENHANCEMENT MODE
最高工作温度：150 °C封装主体材料：PLASTIC/EPOXY
封装形状：ROUND封装形式：CYLINDRICAL
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：N-CHANNEL
最大功率耗散 (Abs)：1 W认证状态：Not Qualified
子类别：FET General Purpose Power表面贴装：NO
端子面层：Tin/Lead (Sn/Pb)端子形式：WIRE
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

TN0624N3 数据手册

 浏览型号TN0624N3的Datasheet PDF文件第2页浏览型号TN0624N3的Datasheet PDF文件第3页浏览型号TN0624N3的Datasheet PDF文件第4页 
TN0620  
TN0624  
Low Threshold  
N-Channel Enhancement-Mode  
Vertical DMOS FETs  
Ordering Information  
Order Number / Package  
BVDSS  
/
RDS(ON)  
ID(ON)  
VGS(th)  
(max)  
BVDGS  
200V  
240V  
(max)  
(min)  
TO-92  
TO-220  
6.0Ω  
6.0Ω  
1.0A  
1.0A  
1.6V  
1.6V  
TN0620N3  
TN0620N5  
TN0624N3  
—
† MIL visual screening available  
High Reliability Devices  
Low Threshold DMOS Technology  
See pages 5-4 and 5-5 for MILITARY STANDARD Process  
Flows and Ordering Information.  
These low threshold enhancement-mode (normally-off) transis-  
tors utilize a vertical DMOS structure and Supertex's well-proven  
silicon-gate manufacturing process. This combination produces  
devices with the power handling capabilities of bipolar transistors  
and with the high input impedance and positive temperature  
coefficient inherent in MOS devices. Characteristic of all MOS  
structures, these devices are free from thermal runaway and  
thermally-induced secondary breakdown.  
Features  
■ Low threshold — 1.6V max.  
■ High input impedance  
■ Low input capacitance — 110pF typical  
■ Fast switching speeds  
Supertex’s vertical DMOS FETs are ideally suited to a wide range  
of switching and amplifying applications where very low threshold  
voltage, highbreakdownvoltage, highinputimpedance, lowinput  
capacitance, and fast switching speeds are desired.  
■ Low on resistance  
■ Free from secondary breakdown  
■ Low input and output leakage  
■ Complementary N- and P-channel devices  
Package Options  
Applications  
■ Logic level interfaces – ideal for TTL and CMOS  
■ Solid state relays  
■ Battery operated systems  
■ Photo voltaic drives  
■ Analog switches  
■ General purpose line drivers  
■ Telecom switches  
G
D
Absolute Maximum Ratings  
Drain-to-Source Voltage  
S
S G D  
TO-220  
TAB: DRAIN  
TO-92  
BVDSS  
Drain-to-Gate Voltage  
BVDGS  
± 20V  
Gate-to-Source Voltage  
Operating and Storage Temperature  
Soldering Temperature*  
-55°C to +150°C  
300°C  
Note: See Package Outline section for dimensions.  
* Distance of 1.6 mm from case for 10 seconds.  
7-55  
1234

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