TMS320VC5505
www.ti.com
SPRS503B–JUNE 2009–REVISED JANUARY 2010
TMS320VC5505
Fixed-Point Digital Signal Processor
Check for Samples: TMS320VC5505
1 Fixed-Point Digital Signal Processor
1.1 TMS320VC5505 Features
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• High-Performance, Low-Power, TMS320C55x™
Fixed-Point Digital Signal Processor
• Device USB Port With Integrated 2.0
High-Speed PHY that Supports:
– 16.67-, 10-ns Instruction Cycle Time
– 60-, 100-MHz Clock Rate
– One/Two Instruction(s) Executed per Cycle
– USB 2.0 Full- and High-Speed Device
• LCD Bridge With Asynchronous Interface
• Tightly-Coupled FFT Hardware Accelerator
– Dual Multipliers [Up to 200 Million
• 10-Bit 4-Input Successive Approximation (SAR)
ADC
Multiply-Accumulates per Second (MMACS)]
– Two Arithmetic/Logic Units (ALUs)
– Three Internal Data/Operand Read Buses
and Two Internal Data/Operand Write Buses
• Real-Time Clock (RTC) With Crystal Input, With
Separate Clock Domain, Separate Power
Supply
• Four Core Isolated Power Supply Domains:
Analog, RTC, CPU and Peripherals, and USB
– Fully Software-Compatible With C55x
Devices
• Four I/O Isolated Power Supply Domains: RTC
I/O, EMIF I/O, USB PHY, and DVDDIO
• Low-Power S/W Programmable Phase-Locked
Loop (PLL) Clock Generator
• On-Chip ROM Bootloader (RBL) to Boot From
NAND Flash, NOR Flash, SPI EEPROM, or I2C
EEPROM
– Industrial Temperature Devices Available
• 320 K Bytes Zero-Wait State On-Chip RAM,
Composed of:
– 64K Bytes of Dual-Access RAM (DARAM),
8 Blocks of 4K x 16-Bit
– 256K Bytes of Single-Access RAM (SARAM),
32 Blocks of 4K x 16-Bit
• IEEE-1149.1 (JTAG™)
• 128K Bytes of Zero Wait-State On-Chip ROM
(4 Blocks of 16K x 16-Bit)
• 16-/8-Bit External Memory Interface (EMIF) with
Glueless Interface to:
– 8-/16-Bit NAND Flash, 1- and 4-Bit ECC
– 8-/16-Bit NOR Flash
– Asynchronous Static RAM (SRAM)
• Direct Memory Access (DMA) Controller
– Four DMA With 4 Channels Each
(16-Channels Total)
• Three 32-Bit General-Purpose Timers
– One Selectable as a Watchdog and/or GP
• Two MultiMedia Card/Secure Digital (MMC/SD)
Interfaces
Boundary-Scan-Compatible
• Up to 26 General-Purpose I/O (GPIO) Pins
(Multiplexed With Other Device Functions)
• 196-Terminal Pb-Free Plastic BGA (Ball Grid
Array) (ZCH Suffix)
• 1.05-V Core (60 MHz), 1.8-V, 2.5-V, 2.8-V, or
3.3-V I/Os
• 1.3-V Core (100 MHz), 1.8-V, 2.5-V, 2.8-V, or
3.3-V I/Os
• Applications:
– Wireless Audio Devices (e.g., Headsets,
Microphones, Speakerphones, etc.)
– Echo Cancellation Headphones
– Portable Medical Devices
– Voice Applications
• Universal Asynchronous Receiver/Transmitter
(UART)
– Industrial Controls
• Serial-Port Interface (SPI) With Four
Chip-Selects
– Fingerprint Biometrics
– Software Defined Radio
• Community Resources
– TI E2E Community
• Master/Slave Inter-Integrated Circuit (I2C Bus™)
• Four Inter-IC Sound (I2S Bus™) for Data
Transport
– TI Embedded Processors Wiki
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.