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TMS320LF2401AVFA PDF预览

TMS320LF2401AVFA

更新时间: 2024-10-26 05:15:47
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器外围集成电路数字信号处理器时钟
页数 文件大小 规格书
134页 1829K
描述
DSP CONTROLLERS

TMS320LF2401AVFA 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:LQFP, QFP32,.35SQ,32针数:32
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:1
Samacsys Confidence:Samacsys Status:Released
Samacsys PartID:607575Samacsys Pin Count:32
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Other
Samacsys Footprint Name:QFP80P900X900X160-32NSamacsys Released Date:2017-01-12 12:59:53
Is Samacsys:N其他特性:REQUIRES 3.3V I/O SUPPLY
地址总线宽度:桶式移位器:YES
位大小:16边界扫描:YES
最大时钟频率:20 MHz外部数据总线宽度:
格式:FIXED POINT集成缓存:NO
内部总线架构:MULTIPLEJESD-30 代码:S-PQFP-G32
JESD-609代码:e4长度:7 mm
低功率模式:YES湿度敏感等级:3
外部中断装置数量:2端子数量:32
计时器数量:3片上数据RAM宽度:16
片上程序ROM宽度:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not QualifiedRAM(字数):1056
ROM可编程性:FLASH座面最大高度:1.6 mm
子类别:Digital Signal Processors最大压摆率:100 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

TMS320LF2401AVFA 数据手册

 浏览型号TMS320LF2401AVFA的Datasheet PDF文件第2页浏览型号TMS320LF2401AVFA的Datasheet PDF文件第3页浏览型号TMS320LF2401AVFA的Datasheet PDF文件第4页浏览型号TMS320LF2401AVFA的Datasheet PDF文件第5页浏览型号TMS320LF2401AVFA的Datasheet PDF文件第6页浏览型号TMS320LF2401AVFA的Datasheet PDF文件第7页 
TMS320LF2407A,ꢀTMS320LF2406A,ꢀTMS320LF2403A,ꢀTMS320LF2402A  
TMS320LC2406A,ꢁTMS320LC2404A,ꢁTMS320LC2403A,ꢁTMS320LC2402A  
DSP CONTROLLERS  
SPRS145K JULY 2000 REVISED AUGUST 2005  
D
D
D
High-Performance Static CMOS Technology  
25-ns Instruction Cycle Time (40 MHz)  
40-MIPS Performance  
D
External Memory Interface (LF2407A)  
192K Words x 16 Bits of Total Memory:  
64K Program, 64K Data, 64K I/O  
Low-Power 3.3-V Design  
D
D
Watchdog (WD) Timer Module  
Based on TMS320C2xx DSP CPU Core  
Code-Compatible With F243/F241/C242  
Instruction Set and Module Compatible  
With F240  
10-Bit Analog-to-Digital Converter (ADC)  
8 or 16 Multiplexed Input Channels  
500-ns MIN Conversion Time  
Selectable Twin 8-State Sequencers  
Triggered by Two Event Managers  
Flash (LF) and ROM (LC) Device Options  
LF240xA: LF2407A, LF2406A,  
LF2403A, LF2402A  
LC240xA: LC2406A, LC2404A,  
LC2403A, LC2402A  
D
Controller Area Network (CAN) 2.0B Module  
(LF2407A, 2406A, 2403A)  
D
D
Serial Communications Interface (SCI)  
16-Bit Serial Peripheral Interface (SPI)  
(LF2407A, 2406A, LC2404A, 2403A)  
D
On-Chip Memory  
Up to 32K Words x 16 Bits of Flash  
EEPROM (4 Sectors) or ROM  
Programmable “Code-Security” Feature  
for the On-Chip Flash/ROM  
Up to 2.5K Words x 16 Bits of  
Data/Program RAM  
D
D
Phase-Locked-Loop (PLL)-Based Clock  
Generation  
Up to 40 Individually Programmable,  
Multiplexed General-Purpose Input/Output  
(GPIO) Pins  
544 Words of Dual-Access RAM  
Up to 2K Words of Single-Access RAM  
D
D
Up to Five External Interrupts (Power Drive  
Protection, Reset, Two Maskable Interrupts)  
D
D
Boot ROM (LF240xA Devices)  
Power Management:  
SCI/SPI Bootloader  
Three Power-Down Modes  
Ability to Power Down Each Peripheral  
Independently  
Up to Two Event-Manager (EV) Modules  
(EVA and EVB), Each Includes:  
Two 16-Bit General-Purpose Timers  
Eight 16-Bit Pulse-Width Modulation  
(PWM) Channels Which Enable:  
Three-Phase Inverter Control  
Center- or Edge-Alignment of PWM  
Channels  
Emergency PWM Channel Shutdown  
With External PDPINTx Pin  
Programmable Deadband (Deadtime)  
Prevents Shoot-Through Faults  
Three Capture Units for Time-Stamping  
of External Events  
D
D
Real-Time JTAG-Compliant Scan-Based  
Emulation, IEEE Standard 1149.1 (JTAG)  
Development Tools Include:  
Texas Instruments (TI) ANSI C Compiler,  
Assembler/Linker, and Code Composer  
StudioDebugger  
Evaluation Modules  
Scan-Based Self-Emulation (XDS510)  
Broad Third-Party Digital Motor Control  
Support  
D
Package Options  
Input Qualifier for Select Pins  
On-Chip Position Encoder Interface  
Circuitry  
Synchronized A-to-D Conversion  
Designed for AC Induction, BLDC,  
Switched Reluctance, and Stepper Motor  
Control  
144-Pin LQFP PGE (LF2407A)  
100-Pin LQFP PZ (2406A, LC2404A)  
64-Pin TQFP PAG (LF2403A, LC2403A,  
LC2402A)  
64-Pin QFP PG (2402A)  
D
Extended Temperature Options (A and S)  
A: 40°C to 85°C  
S: 40°C to 125°C  
Applicable for Multiple Motor and/or  
Converter Control  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Code Composer Studio and XDS510 are trademarks of Texas Instruments.  
Other trademarks are the property of their respective owners.  
IEEE Standard 1149.11990, IEEE Standard Test-Access Port; however, boundary scan is not supported in this device family.  
Copyright 2005, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 772511443  
 

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