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TMS320LC2402PGE PDF预览

TMS320LC2402PGE

更新时间: 2024-10-26 22:36:19
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DSP CONTROLLERS

TMS320LC2402PGE 数据手册

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TMS320LF2407, TMS320LF2406, TMS320LF2402  
TMS320LC2406, TMS320LC2404, TMS320LC2402  
DSP CONTROLLERS  
SPRS094C – APRIL 1999 – REVISED OCTOBER 1999  
D
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High-Performance Static CMOS Technology  
– 33-ns Instruction Cycle Time (30 MHz)  
– 30 MIPS Performance  
D
External Memory Interface (’LF2407)  
– 192K Words x 16 Bits of Total Memory,  
64K Program, 64K Data, 64K I/O  
– Low-Power 3.3-V Design  
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Watchdog (WD) Timer Module  
Based on T320C2xx DSP CPU Core  
– Code-Compatible With ’F243/’F241/’C242  
– Instruction Set and Module Compatible  
With ’F240/’C240  
– Source-Code-Compatible With  
TMS320C1x/2x  
10-Bit Analog-to-Digital Converter (ADC)  
– 8 or 16 Multiplexed Input Channels  
– 500 ns Minimum Conversion Time  
– Selectable Twin 8-Input Sequencers  
Triggered by Two Event Managers  
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Controller Area Network (CAN) 2.0B Module  
Serial Communications Interface (SCI)  
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Flash (LF) and ROM (LC) Device Options  
– ’LF240x : ’LF2407, ’LF2406, ’LF2402  
16-Bit Serial Peripheral Interface (SPI)  
Module (Except ’x2402)  
– ’LC240x : ’LC2406, ’LC2404, ’LC2402  
On-Chip Memory  
Phase-Locked-Loop (PLL)-Based Clock  
Generation  
– Up to 32K Words x 16 Bits of Flash  
EEPROM (4 Sectors) or ROM  
– Up to 2.5K Words x 16 Bits of  
Data/Program RAM  
Up to 40 Individually Programmable,  
Multiplexed General-Purpose Input/Output  
(GPIO) Pins  
– 544 Words of Dual-Access (DARAM)  
– 2K Words of Single-Access (SARAM)  
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Five External Interrupts (Power Drive  
Protection, Reset, and Two Maskable  
Interrupts)  
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Boot ROM (’LF240x Devices)  
– SCI/SPI Flash Bootloader  
Two Event-Manager (EV) Modules (A and B)  
EVA and EVB Each Include:  
– Two 16-Bit General-Purpose Timers  
– Eight 16-Bit Pulse-Width Modulation  
(PWM) Channels Which Enable:  
– Three-Phase Inverter Control  
– Centered or Edge Alignment of PWM  
Channels  
– Emergency PWM Channel Shutdown  
With External PDPINT Pin  
– Programmable Deadband Prevents  
Shoot-Through Faults  
– Three Capture Units For Time-Stamping  
of External Events  
– On-Chip Position Encoder Interface  
Circuitry  
– Synchronized Analog-to-Digital  
Conversion  
– Suitable for AC Induction, BLDC,  
Switched Reluctance, and Stepper Motor  
Control  
Power Management:  
– Three Power-Down Modes  
– Ability to Power-Down Each Peripheral  
Independently  
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Real-Time JTAG-Compliant Scan-Based  
Emulation, IEEE Standard 1149.1 (JTAG)  
Development Tools Include:  
– Texas Instruments (TI ) ANSI  
C Compiler, Assembler/Linker, and  
Code Composer Debugger  
– Evaluation Modules  
– Scan-Based Self-Emulation (XDS510 )  
– Numerous Third-Party Digital Motor  
Control Support  
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Package Options  
– 144-Pin Thin Quad Flatpack (TQFP) PGE  
(’LF2407)  
– 100-Pin TQFP PZ (’LC2404, ’LC2406,  
’LF2406)  
– 64-Pin PQFP PG (’LC2402 and ’LF2402)  
– Applicable for Multiple Motor and/or  
Converter Control  
Extended Temperature Options (A and S)  
– A: – 40°C to 85°C  
– S: – 40°C to 125°C  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
TI, Code Composer, and XDS510 are trademarks of Texas Instruments Incorporated.  
Throughout this data sheet, ’240x is used as a generic name for the ’LF240x/’LC240x family of devices.  
IEEE Standard 1149.1–1990, IEEE Standard Test-Access Port  
Copyright 1999, Texas Instruments Incorporated  
ADVANCE INFORMATION concerns new products in the sampling or  
preproduction phase of development. Characteristic data and other  
specifications are subject to change without notice.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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