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TMS320F28375SPZPQ PDF预览

TMS320F28375SPZPQ

更新时间: 2024-10-28 11:08:03
品牌 Logo 应用领域
德州仪器 - TI 时钟外围集成电路装置闪存
页数 文件大小 规格书
225页 5419K
描述
具有 400MIPS、1xCPU、1xCLA、FPU、TMU、1024KB 闪存、EMIF、12 位 ADC 的汽车类 C2000™ 32 位 MCU | PZP | 100 | -40 to 125

TMS320F28375SPZPQ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ActiveReach Compliance Code:compliant
Factory Lead Time:6 weeks风险等级:1.59
Samacsys Description:Delfino? 32-bit MCU with 400 MIPS, 1xCPU, 1xCLA, FPU, TMU, 1024 KB Flash, EMIF, 12b ADC具有ADC:YES
地址总线宽度:位大小:32
边界扫描:YESCPU系列:TMS320
最大时钟频率:200 MHzDAC 通道:YES
DMA 通道:YES外部数据总线宽度:
格式:FLOATING POINT集成缓存:NO
JESD-30 代码:S-PQFP-G100JESD-609代码:e4
长度:14 mm低功率模式:YES
湿度敏感等级:3DMA 通道数量:6
外部中断装置数量:I/O 线路数量:41
串行 I/O 数:5端子数量:100
计时器数量:3片上数据RAM宽度:8
片上程序ROM宽度:16最高工作温度:125 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:HTFQFP
封装形状:SQUARE封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):260RAM(字节):167936
RAM(字数):164ROM(单词):524288
筛选级别:AEC-Q100座面最大高度:1.2 mm
速度:200 MHz最大压摆率:400 mA
最大供电电压:1.26 V最小供电电压:1.14 V
标称供电电压:1.2 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:14 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

TMS320F28375SPZPQ 数据手册

 浏览型号TMS320F28375SPZPQ的Datasheet PDF文件第2页浏览型号TMS320F28375SPZPQ的Datasheet PDF文件第3页浏览型号TMS320F28375SPZPQ的Datasheet PDF文件第4页浏览型号TMS320F28375SPZPQ的Datasheet PDF文件第5页浏览型号TMS320F28375SPZPQ的Datasheet PDF文件第6页浏览型号TMS320F28375SPZPQ的Datasheet PDF文件第7页 
TMS320F28379S, TMS320F28378S, TMS320F28377S, TMS320F28377S-Q1  
TMS320F28376S, TMS320F28375S, TMS320F28375S-Q1, TMS320F28374S  
SPRS881J – AUGUST 2014 – REVISED FEBRUARY 2021  
TMS320F2837xS Microcontrollers  
– Two Multichannel Buffered Serial Ports  
(McBSPs)  
– Four Serial Communications Interfaces (SCI/  
UART) (pin-bootable)  
1 Features  
TMS320C28x 32-bit CPU  
– 200 MHz  
– IEEE 754 single-precision Floating-Point Unit  
(FPU)  
– Two I2C interfaces (pin-bootable)  
Analog subsystem  
– Trigonometric Math Unit (TMU)  
– Viterbi/Complex Math Unit (VCU-II)  
Programmable Control Law Accelerator (CLA)  
– 200 MHz  
– IEEE 754 single-precision floating-point  
instructions  
– Executes code independently of main CPU  
On-chip memory  
– 512KB (256KW) or 1MB (512KW) of flash  
(ECC-protected)  
– Up to four Analog-to-Digital Converters (ADCs)  
16-bit mode  
– 1.1 MSPS each (up to 4.4-MSPS system  
throughput)  
– Differential inputs  
– Up to 12 external channels  
12-bit mode  
– 3.5 MSPS each (up to 14-MSPS system  
throughput)  
– Single-ended inputs  
– 132KB (66KW) or 164KB (82KW) of RAM  
(ECC-protected or parity-protected)  
– Dual-zone security supporting third-party  
development  
– Unique identification number  
Clock and system control  
– Up to 24 external channels  
Single Sample-and-Hold (S/H) on each ADC  
Hardware-integrated post-processing of  
ADC conversions  
– Saturating offset calibration  
– Error from setpoint calculation  
– High, low, and zero-crossing compare,  
with interrupt capability  
– Two internal zero-pin 10-MHz oscillators  
– On-chip crystal oscillator  
– Windowed watchdog timer module  
– Missing clock detection circuitry  
1.2-V core, 3.3-V I/O design  
System peripherals  
– Two External Memory Interfaces (EMIFs) with  
ASRAM and SDRAM support  
– Trigger-to-sample delay capture  
– Eight windowed comparators with 12-bit Digital-  
to-Analog Converter (DAC) references  
– Three 12-bit buffered DAC outputs  
Enhanced control peripherals  
– 24 PWM channels with enhanced features  
– 16 High-Resolution Pulse Width Modulator  
(HRPWM) channels  
– 6-channel Direct Memory Access (DMA)  
controller  
– Up to 169 individually programmable,  
multiplexed General-Purpose Input/Output  
(GPIO) pins with input filtering  
– Expanded Peripheral Interrupt controller (ePIE)  
– Multiple Low-Power Mode (LPM) support with  
external wakeup  
Communications peripherals  
– USB 2.0 (MAC + PHY)  
– Support for 12-pin 3.3 V-compatible Universal  
Parallel Port (uPP) interface  
– Two Controller Area Network (CAN) modules  
(pin-bootable)  
High resolution on both A and B channels of  
8 PWM modules  
Dead-band support (on both standard and  
high resolution)  
– Six Enhanced Capture (eCAP) modules  
– Three Enhanced Quadrature Encoder Pulse  
(eQEP) modules  
– Eight Sigma-Delta Filter Module (SDFM) input  
channels, 2 parallel filters per channel  
Standard SDFM data filtering  
Comparator filter for fast action for out of  
range  
– Three high-speed (up to 50-MHz) SPI ports  
(pin-bootable)  
Configurable Logic Block (CLB)  
– Augments existing peripheral capability  
– Supports position manager solutions  
Functional Safety-Compliant  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 

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