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TMS320F2810 PDF预览

TMS320F2810

更新时间： 2024-11-18 23:03:43
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德州仪器 - TI 数字信号处理器
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103页 1336K
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DIGITAL SIGNAL PROCESSORS

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TMS320F2810 数据手册

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TMS320F2810, TMS320F2812  
DIGITAL SIGNAL PROCESSORS  
SPRS174B – APRIL 2001 – REVISED SEPTEMBER 2001  
D
D
High-Performance Static CMOS Technology  
– 150 MHz (6.67-ns Cycle Time)  
– Low-Power (1.8-V Core, 3.3-V I/O) Design  
– 3.3-V Flash Programming Voltage  
D
D
Three 32-Bit CPU-Timers  
Serial Port Peripherals  
– Serial Peripheral Interface (SPI)  
– Two Serial Communications Interfaces  
(SCIs), Standard UART  
– Enhanced Controller Area Network  
(eCAN)  
High-Performance CPU (C28x)  
– 16 x 16 and 32 x 32 MAC Operations  
– 16 x 16 Dual MAC  
– Harvard Bus Architecture  
– Atomic Operations  
– Multichannel Buffered Serial Port  
(McBSP) With SPI Mode  
– Fast Interrupt Response and Processing  
– Unified Memory Programming Model  
– 4M Linear Program Address Reach  
– 4G Linear Data Address Reach  
– Code-Efficient (in C/C++ and Assembly)  
– TMS320F24x/LF240x Processor Source  
Code Compatible  
D
12-Bit ADC, 16 Channels  
– 2 x 8 Channel Input Multiplexer  
– Two Sample-and-Hold  
– Single Conversion Time: 200 ns  
– Pipeline Conversion Time: 60 ns  
D
D
D
Up to 56 Individually Programmable,  
Multiplexed General-Purpose Input/Output  
(GPIO) Pins  
D
On-Chip Memory  
– Up to 128K x 16 Flash  
Advanced Emulation Features  
– Analysis and Breakpoint Functions  
– Real-Time Debug via Hardware  
(8 x 4K and 6 x 16K Sectors)  
– 2K x 16 OTP ROM  
– L0 and L1: 2 Blocks of 4K x 16  
Single-Access RAM (SARAM)  
– H0: 1 Block of 8K x 16 SARAM  
– M0 and M1: 2 Blocks of 1K x 16 SARAM  
Development Tools Include  
– ANSI C/C++ Compiler/Assembler/Linker  
– Supports TMS320C24x /240x  
Instructions  
– Code Composer Studio IDE  
– DSP BIOS  
D
D
Boot ROM (4K x 16)  
– With Software Boot Modes  
– Standard Math Tables  
†
– JTAG Scan Controllers  
External Interface (F2812)  
– Up to 1.5M Total Memory  
– Programmable Wait States  
– Programmable Read/Write Strobe Timing  
– Four Individual Chip Selects  
(TI or Third-Party)  
– Evaluation Modules  
– Broad Third-Party Digital Motor Control  
Support  
D
D
Low-Power Modes and Power Savings  
– IDLE, STANDBY, HALT Modes Supported  
– Disable Individual Peripheral Clocks  
D
Clock and System Control  
– Dynamic PLL Ratio Changes Supported  
– On-Chip Oscillator  
Package Options  
– 179-Pin MicroStar BGA With External  
Interface (GHH) (F2812)  
– Watchdog Timer Module  
D
D
D
Three External Interrupts  
Peripheral Interrupt Expansion (PIE) Block  
That Supports 45 Peripheral Interrupts  
– 176-Pin Low-Profile Quad Flatpack  
(LQFP) With External Interface (PGF)  
(F2812)  
– 128-Pin LQFP Without External Interface  
(PBK) (F2810)  
128-Bit Security Key/Lock  
– Protects Flash/OTP and L0/L1 SARAM  
– Prevents Firmware Reverse Engineering  
D
Temperature Options:  
– A: –40°C to 85°C  
– S: –40°C to 125°C  
D
Motor Control Peripherals  
– Two Event Managers (EVA, EVB)  
– Compatible to 240x Devices  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
TMS320C24x, Code Composer Studio, and MicroStar BGA are trademarks of Texas Instruments.  
All trademarks are the property of their respective owners.  
†
IEEE Standard 1149.1–1990, IEEE Standard Test-Access Port  
Copyright 2001, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443  
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