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TMS320C6701GJC150 PDF预览

TMS320C6701GJC150

更新时间: 2024-11-19 22:09:47
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器外围集成电路数字信号处理器装置时钟
页数 文件大小 规格书
64页 860K
描述
FLOATING POINT DIGITAL SIGNAL PROCESSOR

TMS320C6701GJC150 技术参数

生命周期:Active零件包装代码:BGA
包装说明:BGA-352针数:352
Reach Compliance Code:not_compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01Factory Lead Time:6 weeks
风险等级:1.38Is Samacsys:N
其他特性:ALSO REQUIRES 3.3V SUPPLY地址总线宽度:22
桶式移位器:NO位大小:32
边界扫描:YES最大时钟频率:149.25 MHz
外部数据总线宽度:32格式:FLOATING POINT
集成缓存:YES内部总线架构:MULTIPLE
JESD-30 代码:S-PBGA-B352JESD-609代码:e0
长度:35 mm低功率模式:YES
湿度敏感等级:4DMA 通道数量:4
外部中断装置数量:4端子数量:352
计时器数量:2最高工作温度:90 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:HBGA封装等效代码:BGA352,26X26,50
封装形状:SQUARE封装形式:GRID ARRAY, HEAT SINK/SLUG
峰值回流温度(摄氏度):220电源:1.8,3.3 V
认证状态:Not QualifiedRAM(字数):16384
座面最大高度:3.5 mm子类别:Digital Signal Processors
最大供电电压:1.89 V最小供电电压:1.71 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:35 mm
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

TMS320C6701GJC150 数据手册

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SPRS067E – MAY 1998 – REVISED MAY 2000  
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Highest Performance Floating-Point Digital  
Signal Processor (DSP) TMS320C6701  
– 8.3-, 6.7-, 6-ns Instruction Cycle Time  
– 120-, 150-, 167-MHz Clock Rate  
– Eight 32-Bit Instructions/Cycle  
– 1 GFLOPS  
GJC (352-PIN BGA) PACKAGE  
(BOTTOM VIEW)  
26  
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– TMS320C6201 Fixed-Point DSP  
Pin-Compatible  
VelociTI Advanced Very Long Instruction  
Word (VLIW) ’C67x CPU Core  
– Eight Highly Independent Functional  
Units:  
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AB  
AC  
AD  
AE  
AF  
– Four ALUs (Floating- and Fixed-Point)  
– Two ALUs (Fixed-Point)  
– Two Multipliers (Floating- and  
Fixed-Point)  
– Load-Store Architecture With 32 32-Bit  
General-Purpose Registers  
– Instruction Packing Reduces Code Size  
– All Instructions Conditional  
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Instruction Set Features  
– Hardware Support for IEEE  
Single-Precision Instructions  
– Hardware Support for IEEE  
Double-Precision Instructions  
– Byte-Addressable (8-, 16-, 32-Bit Data)  
– 8-Bit Overflow Protection  
– Saturation  
D
16-Bit Host-Port Interface (HPI)  
– Access to Entire Memory Map  
D
Two Multichannel Buffered Serial Ports  
(McBSPs)  
– Direct Interface to T1/E1, MVIP, SCSA  
Framers  
– Bit-Field Extract, Set, Clear  
– Bit-Counting  
– Normalization  
– ST-Bus-Switching Compatible  
– Up to 256 Channels Each  
– AC97-Compatible  
– Serial-Peripheral-Interface (SPI)  
Compatible (Motorola )  
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1M-Bit On-Chip SRAM  
– 512K-Bit Internal Program/Cache  
(16K 32-Bit Instructions)  
– 512K-Bit Dual-Access Internal Data  
(64K Bytes)  
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Two 32-Bit General-Purpose Timers  
Flexible Phase-Locked-Loop (PLL) Clock  
Generator  
32-Bit External Memory Interface (EMIF)  
– Glueless Interface to Synchronous  
Memories: SDRAM and SBSRAM  
– Glueless Interface to Asynchronous  
Memories: SRAM and EPROM  
– 52M-Byte Addressable External Memory  
Space  
IEEE-1149.1 (JTAG )  
Boundary-Scan-Compatible  
352-Pin Ball Grid Array (BGA) Package  
(GJC Suffix)  
0.18-µm/5-Level Metal Process  
– CMOS Technology  
D
Four-Channel Bootloading  
Direct-Memory-Access (DMA) Controller  
With an Auxiliary Channel  
D
3.3-V I/Os, 1.8-V Internal (120-, 150-MHz)  
3.3-V I/Os, 1.9-V Internal (167-MHz Only)  
D
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
VelociTI is a trademark of Texas Instruments.  
Motorola is a trademark of Motorola, Inc.  
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.  
Copyright 2000, Texas Instruments Incorporated  
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1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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