TMS320C54V90
EMBEDDED V.90 MODEM DSP
SPRS165F − JULY 2001 − REVISED OCTOBER 2003
D Provides Two-Chip Modem Solution
D Data Rates from 300 bps to 56 Kbps
D Applications
− Embedded Systems
− Set-Top Boxes
− Gaming Consoles
− Internet Appliances
D Data Modulation Standards
V.90, V.34, V.32bis, V.32, V.22bis, V.22, V.23,
V.21 and V.23 Reversible (Minitel), Bell 212,
Bell 103
− Portable Devices
(PDAs, Digital Cameras)
− Remote Data Collection, Point-of-Sale
− Meter Reading, Utility Monitoring
D FAX Capabilities
− ITU−T V.17, V.29, V.27ter Modulations
− TIA/EIA 578 Class 1 Interface
D On-Chip Peripherals
D V.42 or MNP Class 3 and 4 Error Control
− Software-Programmable Wait-State
Generator and Programmable Bank
Switching
and V.42bis Compression
D Caller ID
− On-Chip Phase-Locked Loop (PLL) Clock
Generator With Internal Oscillator or
External Clock Source
− Two Multichannel Buffered Serial Ports
(McBSPs)
− Enhanced 8-Bit Parallel Host-Port
Interface (HPI8)
D Field-Proven Modem Algorithms Give
Highest Performance, Reliability, and
Compatibility
D Non-Volatile EEPROM Configuration
Storage
D Worldwide Telecom Approvals
D Parallel Phone Support Including Parallel
D Power Consumption Control With IDLE1,
IDLE2, and IDLE3 Instructions With
Power-Down Modes
Phone Detection
D Parallel Phone Exclusion Relay Control
D Protected Against Surge and Overvoltage
D On-Chip Scan-Based Emulation Logic,
†
on the Telephone Line
IEEE Std 1149.1 (JTAG) Boundary Scan
Logic
D Parallel Host Port Interface Supports a
Variety of Industry Standard Busses
D 8.5-ns Single-Cycle Fixed-Point Instruction
Execution Time (117.96 MIPS) or 17-ns
Instruction Execution Time (58.98 MIPS) for
3.3-V Power Supply (1.5-V Core)
D Integral Serial Interface (UART)
D Autobaud on Serial DTE Interface
D State-of-the-Art Integrated Transformerless
D Available in a 144-Pin Plastic Low-Profile
Quad Flatpack (LQFP) (PGE Suffix) and a
144-Pin Ball Grid Array (BGA) (GGU Suffix)
Silicon DAA for Phone Line Interconnection
D 40K x 16-Bit Dual-Access On-Chip RAM
D 128K x 16-Bit On-Chip ROM
description
The TMS320C54V90 is used to implement a full-featured, high-performance modem technology, intended for
use in embedded systems and similar applications. This highly integrated solution implements a complete
modem using only two chips: the TMS320C54V90 DSP with on-chip RAM and ROM, and the Si3016 line-side
DAA.
The modem can connect to a host system serially (RS-232 functionality), or as an 8-bit peripheral to the
processor in a host system. The TMS320C54V90 uses a standard Digital Signal Processor (DSP) and
proprietary firmware to perform all the modem signal processing, the V.42/V.42bis compression, and AT
commands interpretation for modem control functions.
.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Note: Human Body Model ESD test performance for this product was demonstrated to be 1.5 kV during product qualification. Industry standard
test method used was IEA/JESD22-A114. Adherence to ESD handling precautionary procedures is advised at all times.
All trademarks are the property of their respective owners.
†
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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