5秒后页面跳转
TMS320C40GFL60 PDF预览

TMS320C40GFL60

更新时间: 2024-02-17 16:39:42
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器外围集成电路数字信号处理器装置PC时钟
页数 文件大小 规格书
45页 798K
描述
DIGITAL SIGNAL PROCESSOR

TMS320C40GFL60 技术参数

生命周期:Not Recommended零件包装代码:PGA
包装说明:SPGA, SPGA325,35X35MOD针数:325
Reach Compliance Code:not_compliantECCN代码:3A001.A.3
HTS代码:8542.31.00.01风险等级:8.35
Samacsys Confidence:4Samacsys Status:Released
Samacsys PartID:11539923Samacsys Pin Count:325
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Other
Samacsys Footprint Name:TMS320C40GFL60-2Samacsys Released Date:2020-03-20 11:50:01
Is Samacsys:N地址总线宽度:31
桶式移位器:YES位大小:32
边界扫描:YES最大时钟频率:60 MHz
外部数据总线宽度:32格式:FLOATING POINT
集成缓存:NO内部总线架构:MULTIPLE
JESD-30 代码:S-CPGA-P325长度:47.25 mm
低功率模式:YESDMA 通道数量:6
外部中断装置数量:5串行 I/O 数:
端子数量:325计时器数量:2
片上数据RAM宽度:8片上程序ROM宽度:
最高工作温度:85 °C最低工作温度:
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:SPGA
封装等效代码:SPGA325,35X35MOD封装形状:SQUARE
封装形式:GRID ARRAY, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
RAM(字数):4096座面最大高度:5.08 mm
子类别:Digital Signal Processors最大压摆率:950 mA
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:OTHER
端子形式:PIN/PEG端子节距:2.54 mm
端子位置:PERPENDICULAR处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:47.25 mmuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

TMS320C40GFL60 数据手册

 浏览型号TMS320C40GFL60的Datasheet PDF文件第2页浏览型号TMS320C40GFL60的Datasheet PDF文件第3页浏览型号TMS320C40GFL60的Datasheet PDF文件第4页浏览型号TMS320C40GFL60的Datasheet PDF文件第5页浏览型号TMS320C40GFL60的Datasheet PDF文件第6页浏览型号TMS320C40GFL60的Datasheet PDF文件第7页 
TMS320C40  
DIGITAL SIGNAL PROCESSOR  
SPRS038 – JANUARY 1996  
325-PIN GF GRID ARRAY PACKAGE  
Highest Performance Floating-Point Digital  
Signal Processor (DSP)  
– ’320C40-60:  
33-ns Instruction Cycle Time,  
330 MOPS, 60 MFLOPS,  
30 MIPS, 384M Bytes/s  
– ’320C40-50:  
(BOTTOM VIEW)  
AR  
AP  
AN  
AM  
AL  
AK  
AJ  
AH  
AG  
AF  
AE  
AD  
AC  
AB  
AA  
40-ns Instruction Cycle Time  
– ’320C40-40:  
50-ns Instruction Cycle Time  
Y
W
U
R
N
Six Communications Ports  
V
T
P
Six-Channel Direct Memory Access (DMA)  
Coprocessor  
M
K
H
F
L
J
Single-Cycle Conversion to and From  
IEEE-754 Floating-Point Format  
G
E
C
A
Single Cycle, 1/x, 1/ x  
D
B
Source-Code Compatible With TMS320C3x  
Single-Cycle 40-Bit Floating-Point,  
32-Bit Integer Multipliers  
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30 32 34  
9
11 13 15 17 19 21 23 25 27 29 31 33 35  
1
3
5
7
Pin A1  
Twelve 40-Bit Registers, Eight Auxiliary  
Registers, 14 Control Registers, and Two  
Timers  
See Pin Assignments table and Pin Functions table for location  
and description of all pins.  
IEEE 1149.1 (JTAG) Boundary Scan  
Compatible  
Two Identical External Data and Address  
Buses Supporting Shared Memory Systems  
and High Data-Rate, Single-Cycle  
Transfers:  
– High Port-Data Rate of 120M Bytes/s  
(’C40-60) (Each Bus)  
Separate Internal Program, Data, and DMA  
Coprocessor Buses for Support of Massive  
Concurrent Input/Output (I/O) of Program  
and Data Throughput, Maximizing  
Sustained Central Processing Unit (CPU)  
Performance  
– 16G-Byte Continuous  
Program/Data/Peripheral Address  
Space  
– Memory-Access Request for Fast,  
Intelligent Bus Arbitration  
– Separate Address-Bus, Data-Bus, and  
Control-Enable Pins  
– Four Sets of Memory-Control Signals  
Support Different Speed Memories in  
Hardware  
On-Chip Program Cache and  
Dual-Access/Single-Cycle RAM for  
Increased Memory-Access Performance  
– 512-Byte Instruction Cache  
– 8K Bytes of Single-Cycle Dual-Access  
Program or Data RAM  
– ROM-Based Boot Loader Supports  
Program Bootup Using 8-, 16-, or 32-Bit  
Memories or One of the Communication  
Ports  
325-Pin Ceramic Grid Array (GF Suffix)  
Fabricated Using 0.72-µm Enhanced  
Performance Implanted CMOS (EPIC )  
Technology by Texas Instruments (TI )  
IDLE2 Clock-Stop Power-Down Mode  
5-V Operation  
Software-Communication-Port Reset  
NMI With Bus-Grant Feature  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
IEEE Standard 1149.1–1990 Standard Test-Access Port and Boundary-Scan Architecture  
EPIC and TI are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

TMS320C40GFL60 替代型号

型号 品牌 替代类型 描述 数据表
TMS320C40GFL40 TI

完全替代

DIGITAL SIGNAL PROCESSOR
5962-9466903QXC TI

类似代替

DIGITAL SIGNAL PROCESSORS
5962-9466902QXC TI

类似代替

DIGITAL SIGNAL PROCESSORS

与TMS320C40GFL60相关器件

型号 品牌 获取价格 描述 数据表
TMS320C40TAB40 TI

获取价格

32-BIT, 40MHz, OTHER DSP, UUC352
TMS320C40TABL40 TI

获取价格

32-BIT, 40MHz, OTHER DSP, UUC325
TMS320C40TABL50 ETC

获取价格

32-Bit Digital Signal Processor
TMS320C40TABL60 TI

获取价格

32-BIT, 60MHz, OTHER DSP, UUC325
TMS320C44 TI

获取价格

DIGITAL SIGNAL PROCESSOR
TMS320C44-50 ETC

获取价格

Digital Signal Processors
TMS320C44-60 ETC

获取价格

Digital Signal Processors
TMS320C44GFW50 TI

获取价格

32-BIT, 50MHz, OTHER DSP, PBGA388, PLASTIC, BGA-388
TMS320C44GFW60 TI

获取价格

32-BIT, 60MHz, OTHER DSP, PBGA388, PLASTIC, BGA-388
TMS320C44GFWA TI

获取价格

32-BIT, 50MHz, OTHER DSP, PBGA388, PLASTIC, BGA-388