Datasheet > TM497BBK32S

TM497BBK32S

更新时间： 2024-09-22 22:25:35

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
9页	121K
描述
4194304 BY 32-BIT DYNAMIC RAM MODULE

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数据手册

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TM497BBK32S 数据手册

TM497BBK32, TM497BBK32S

4194304 BY 32-BIT

DYNAMIC RAM MODULE

SMMS433B – JANUARY 1993 – REVISED JUNE 1995

Organization . . . 4194304 × 32

Presence Detect

Performance Ranges:

Single 5-V Power Supply (±10% Tolerance)

ACCESS ACCESS ACCESS READ OR

72-Pin Single-In-Line Memory Module

(SIMM) for Use With Sockets

TIME

WRITE

CYCLE

(MIN)

RAC

CAC

(MAX)

60 ns

70 ns

80 ns

(MAX)

30 ns

35 ns

40 ns

(MAX)

15 ns

18 ns

20 ns

Utilizes Eight 16-Megabit DRAMs in Plastic

Small-Outline J-Lead (SOJ) Packages

’497BBK32-60

’497BBK32-70

’497BBK32-80

110 ns

130 ns

150 ns

Long Refresh Period

32 ms (2048 Cycles)

Low Power Dissipation

All Inputs, Outputs, Clocks Fully TTL

Compatible

Operating Free-Air-Temperature Range

0°C to 70°C

3-State Output

†

Gold-Tabbed Version Available:

Common CAS Control for Eight Common

Data-In and Data-Out Lines in Four Blocks

TM497BBK32

Tin-Lead (Solder) Tabbed Version

Available: TM497BBK32S

Enhanced Page Mode Operation With

CAS-Before-RAS (CBR), RAS-Only, and

Hidden Refresh

description

The TM497BBK32 is a 16M-byte dynamic random-access memory (DRAM) organized as four times 4194304

× 8 in a 72-pin leadless single-in-line memory module (SIMM). The SIMM is composed of eight TMS417400DJ,

4194304 × 4-bit DRAMs, each in 24/26-lead plastic small-outline J-lead (SOJ) packages mounted on a

substrate with decoupling capacitors. The TMS417400DJ is described in the TMS417400 data sheet.

The TM497BBK32 SIMM is available in the single-sided BK leadless module for use with sockets. The

TM497BBK32 SIMM features RAS access times of 60 ns, 70 ns, and 80 ns. This device is characterized for

operation from 0°C to 70°C.

operation

The TM497BBK32 operates as eight TMS417400DJs connected as shown in the functional block diagram and

Table 1. The common I/O feature dictates the use of early write cycles to prevent contention on D and Q.

refresh

The refresh period is extended to 32 ms and, during this period, each of the 2048 rows must be strobed with

RAS in order to retain data. CAS can remain high during the refresh sequence to conserve power.

power up

To achieve proper operation, an initial pause of 200 µs followed by a minimum of eight initialization cycles is

required after full V level is achieved. These eight initialization cycles need to include at least one refresh

(RAS-only or CBR) cycle.

†

Part numbers in this data sheet are for the gold-tabbed version; the information applies to both gold-tabbed and solder-tabbed versions.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

12 3 4 5 6 7...9

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与TM497BBK32S相关器件

型号	品牌	获取价格	描述	数据表
TM497BBK32S-60	TI	获取价格	4194304 BY 32-BIT DYNAMIC RAM MODULE
TM497BBK32S-70	TI	获取价格	4194304 BY 32-BIT DYNAMIC RAM MODULE
TM497BBK32S-80	TI	获取价格	4194304 BY 32-BIT DYNAMIC RAM MODULE
TM497EAD9B-10	TI	获取价格	4MX9 FAST PAGE DRAM MODULE, 100ns, SMA30, SIMM-30
TM497EAD9B-60	TI	获取价格	4MX9 FAST PAGE DRAM MODULE, 60ns, SMA30, SIMM-30
TM497EAD9B-80	TI	获取价格	4MX9 FAST PAGE DRAM MODULE, 80ns, SMA30, SIMM-30
TM497EU9	TI	获取价格	4194304-WORD BY 9-BIT DYNAMIC RAM MODULE
TM497EU9-70	TI	获取价格	4MX9 FAST PAGE DRAM MODULE, 70ns, SMA30, SIMM-30
TM497FBK32	TI	获取价格	EXTENDED DATA OUT DYNAMIC RAM MODULES
TM497FBK32-60	TI	获取价格	4MX32 EDO DRAM MODULE, 60ns, SMA72, SIMM-72

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