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TLV571IDWR

更新时间： 2024-10-02 03:59:19
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
28页 420K
描述
2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER

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TLV571IDWR 数据手册

 浏览型号TLV571IDWR的Datasheet PDF文件第2页浏览型号TLV571IDWR的Datasheet PDF文件第3页浏览型号TLV571IDWR的Datasheet PDF文件第4页浏览型号TLV571IDWR的Datasheet PDF文件第5页浏览型号TLV571IDWR的Datasheet PDF文件第6页浏览型号TLV571IDWR的Datasheet PDF文件第7页 
TLV571  
2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT,  
PARALLEL ANALOG-TO-DIGITAL CONVERTER  
SLAS239A – SEPTEMBER 1999 – REVISED FEBRUARY 2000  
features  
applications  
Fast Throughput Rate: 1.25 MSPS at 5 V,  
625 KSPS at 3 V  
Mass Storage and HDD  
Automotive  
Wide Analog Input: 0 V to AV  
DD  
Digital Servos  
Differential Nonlinearity Error: < ± 0.5 LSB  
Process Control  
Integral Nonlinearity Error: < ± 0.5 LSB  
Single 2.7-V to 5.5-V Supply Operation  
Low Power: 12 mW at 3 V and 35 mW at 5 V  
Auto Power Down of 1 mA Max  
Software Power Down: 10 µA Max  
Internal OSC  
General-Purpose DSP  
Image Sensor Processing  
DW OR PW PACKAGE  
(TOP VIEW)  
CS  
WR  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
NC  
AIN  
2
Hardware Configurable  
RD  
3
AV  
DD  
4
CLK  
AGND  
REFM  
REFP  
CSTART  
A1/D7  
A0/D6  
D5  
DSP and Microcontroller Compatible  
Parallel Interface  
5
DGND  
6
DV  
DD  
7
INT/EOC  
DGND  
DGND  
D0  
Binary/Twos Complement Output  
8
Hardware Controlled Extended Sampling  
Hardware or Software Start of Conversion  
9
10  
11  
12  
D1  
D2  
D4  
D3  
description  
The TLV571 is an 8-bit data acquisition system  
that combines a high-speed 8-bit ADC and a  
NC – No internal connection  
parallel interface. The device contains two on-chip control registers allowing control of software conversion start  
and power down via the bidirectional parallel port. The control registers can be set to a default mode using a  
dummy RD while WR is tied low allowing the registers to be hardware configurable.  
The TLV571 operates from a single 2.7-V to 5.5-V power supply. It accepts an analog input range from 0 V to  
AV  
and digitizes the input at a maximum 1.25 MSPS throughput rate at 5 V. The power dissipations are only  
DD  
12 mW with a 3-V supply or 35 mW with a 5-V supply. The device features an auto power-down mode that  
automatically powers down to 1 mA 50 ns after conversion is performed. In software power-down mode, the  
ADC is further powered down to only 10 µA.  
Very high throughput rate, simple parallel interface, and low power consumption make the TLV571 an ideal  
choice for high-speed digital signal processing.  
AVAILABLE OPTIONS  
PACKAGE  
T
A
24 TSSOP  
(PW)  
24 SOIC  
(DW)  
–40°C to 85°C  
TLV571IPW  
TLV571IDW  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...28

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TLV571IDWR 替代型号

型号 品牌 替代类型 描述 数据表
TLV571IDWG4 TI

类似代替

 2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER
TLV571IDW TI

类似代替

 2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER

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