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TLV5604IPW

更新时间: 2024-11-20 03:59:19
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
27页 360K
描述
2.7-V TO 5.5-V 10-BIT 3-mS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN

TLV5604IPW 数据手册

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TLV5604  
2.7-V TO 5.5-V 10-BIT 3-µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS  
WITH POWER DOWN  
SLAS176A – DECEMBER 1997 – REVISED SEPTEMBER 1998  
Four 10-Bit D/A Converters  
Hardware Power Down (10 nA)  
Software Power Down (10 nA)  
Simultaneous Update  
Programmable Settling Time  
of 3 µs or 9 µs Typ  
TMS320, (Q)SPI, and Microwire Compatible  
Serial Interface  
applications  
Internal Power-On Reset  
Battery Powered Test Instruments  
Digital Offset and Gain Adjustment  
Industrial Process Controls  
Low Power Consumption:  
5.5 mW, Slow Mode – 5-V Supply  
3.3 mW, Slow Mode – 3-V Supply  
Machine and Motion Control Devices  
Communications  
Reference Input Buffers  
Voltage Output Range . . . 2× the Reference  
Input Voltage  
Arbitrary Waveform Generation  
Monotonic Over Temperature  
D OR PW PACKAGE  
(TOP VIEW)  
Dual 2.7-V to 5.5-V Supply (Separate Digital  
and Analog Supplies)  
AV  
REFINAB  
OUTA  
OUTB  
OUTC  
OUTD  
REFINCD  
AGND  
DV  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
DD  
DD  
description  
PD  
LDAC  
DIN  
SCLK  
CS  
The TLV5604 is a quadruple 10-bit voltage output  
digital-to-analog converter (DAC) with a flexible  
4-wire serial interface. The 4-wire serial interface  
allows glueless interface to TMS320, SPI, QSPI,  
and Microwire serial ports. The TLV5604 is  
programmed with a 16-bit serial word comprised  
ofaDACaddress, individualDACcontrolbits, and  
a 10-bit DAC value.  
FS  
DGND  
The device has provision for two supplies: one digital supply for the serial interface (via pins DV and DGND),  
DD  
and one for the DACs, reference buffers and output buffers (via pins AV  
and AGND). Each supply is  
DD  
independent of the other, and can be any value between 2.7 V and 5.5 V. The dual supplies allow a typical  
application where the DAC will be controlled via a microprocessor operating on a 3-V supply (also used on pins  
DV  
and DGND), with the DACs operating on a 5-V supply. Of course, the digital and analog supplies can be  
DD  
tied together.  
The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class AB  
output stage to improve stability and reduce settling time. A rail-to-rail output stage and a power-down mode  
makes it ideal for single voltage, battery based applications. The settling time of the DAC is programmable to  
allow the designer to optimize speed versus power dissipation. The settling time is chosen by the control bits  
within the 16-bit serial input string. A high-impedance buffer is integrated on the REFINAB and REFINCD  
terminals to reduce the need for a low source impedance drive to the terminal. REFINAB and REFINCD allow  
DACs A and B to have a different reference voltage then DACs C and D.  
The device, implemented with a CMOS process, is available in 16-terminal SOIC and TSSOP packages. The  
TLV5604C is characterized for operation from 0°C to 70°C. The TLV5604I is characterized for operation from  
40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

TLV5604IPW 替代型号

型号 品牌 替代类型 描述 数据表
TLV5604CPW TI

完全替代

2.7-V TO 5.5-V 10-BIT 3-mS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN
TLV5604CPWRG4 TI

类似代替

2.7-V TO 5.5-V 10-BIT 3-μS QUADRUPLE DIGITAL
TLV5604IPWR TI

类似代替

2.7-V TO 5.5-V 10-BIT 3-mS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN

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