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TLV342IDGKT PDF预览

TLV342IDGKT

更新时间: 2024-11-20 04:28:07
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德州仪器 - TI 运算放大器输出元件
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24页 682K
描述
LOW-VOLTAGE RAIL-TO-RAIL OUTPUT CMOS OPERATIONAL AMPLIFIERS WITH SHUTDOWN

TLV342IDGKT 数据手册

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ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢀ ꢁꢂꢃ ꢄ ꢇꢆ ꢀꢁꢂ ꢃꢄ ꢄ  
ꢁꢈ ꢉꢊꢂ ꢈꢁꢀꢋꢌ ꢍ ꢎꢋꢏ ꢁ ꢊꢀꢈ ꢊꢎꢋꢏ ꢁ ꢈ ꢐꢀ ꢑꢐꢀ ꢒꢓ ꢈ ꢔ ꢈ ꢑꢍꢎ ꢋꢀ ꢏꢈ ꢕꢋꢁ ꢋꢓ ꢑ ꢁꢏ ꢖꢏ ꢍꢎ ꢔ  
ꢉ ꢏꢀ ꢗ ꢔꢗ ꢐꢀ ꢘꢈ ꢉ ꢕ  
SLVS568B − JANUARY 2005 − REVISED DECEMBER 2005  
D
D
1.8-V and 5-V Performance  
D
D
Input Referred Voltage Noise (at 10 kHz)  
. . . 20 nV//Hz  
Low Offset (A Grade)  
− 1.25 mV Max (255C)  
− 1.7 mV Max (−405C to 1255C)  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
D
D
Rail-to-Rail Output Swing  
D
Applications  
Wide Common-Mode Input Voltage  
− Cordless/Cellular Phones  
− Consumer Electronics (Laptops, PDAs)  
− Audio Pre-Amp for Voice  
− Portable/Battery-Powered Electronic  
Equipment  
− Supply Current Monitoring  
− Battery Monitoring  
− Buffers  
Range . . . −0.2 V to (V − 0.5 V)  
+
D
D
D
D
D
D
D
Input Bias Current . . . 1 pA (Typ)  
Input Offset Voltage . . . 0.3 mV (Typ)  
Low Supply Current . . . 70 µA/Channel  
Low Shutdown Current . . . 10 pA (Typ)  
Gain Bandwidth . . . 2.3 MHz (Typ)  
Slew Rate . . . 0.9 V/µs (Typ)  
Turn-On Time From Shutdown  
. . . 5 µs (Typ)  
− Filters  
− Drivers  
TLV342 . . . D (SOIC) OR DGK (MSOP) PACKAGE  
(TOP VIEW)  
TLV341 . . . DBV (SOT-23) OR DCK (SC-70) PACKAGE  
(TOP VIEW)  
1OUT  
1IN−  
1IN+  
GND  
V
+
1
2
3
4
8
7
6
5
V
IN+  
GND  
IN−  
1
2
3
6
5
4
+
2OUT  
2IN−  
2IN+  
SHDN  
OUT  
TLV344 . . . D (SOIC) OR PW (TSSOP) PACKAGE  
(TOP VIEW)  
TLV341 . . . DRL (SOT-563) PACKAGE  
(TOP VIEW)  
4OUT  
4IN−  
4IN+  
GND  
3IN+  
3IN−  
3OUT  
1OUT  
1IN−  
1IN+  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V
GND  
IN+  
1
2
3
6
5
4
+
SHDN  
V
+
OUT  
IN−  
2IN+  
2IN−  
8
2OUT  
description/ordering information  
The TLV341, TLV342, and TLV344 are single, dual, and quad CMOS operational amplifiers, respectively, with  
low-voltage, low-power, and rail-to-rail output swing capabilities. The PMOS input stage offers an ultra-low input  
bias current of 1 pA (typ) and an offset voltage of 0.3 mV (typ). For applications requiring excellent dc precision,  
the A grade (TLV34xA) has a low offset voltage of 1.25 mV (max) at 25°C.  
These single-supply amplifiers are designed specifically for ultra-low-voltage (1.5-V to 5-V) operation, with a  
common-mode input voltage range that typically extends from −0.2 V to 0.5 V from the positive supply rail.  
Additional features include 20-nV/Hz voltage noise at 10 kHz, 2.3-MHz unity-gain bandwidth, and 0.9-V/µs  
slew rate.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢀꢤ  
Copyright 2005, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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