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TLV320AIC24KI PDF预览

TLV320AIC24KI

更新时间: 2024-11-23 22:49:43
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德州仪器 - TI /
页数 文件大小 规格书
53页 955K
描述
Layout and Grounding Guidelines for TLV320AIC2x

TLV320AIC24KI 数据手册

 浏览型号TLV320AIC24KI的Datasheet PDF文件第2页浏览型号TLV320AIC24KI的Datasheet PDF文件第3页浏览型号TLV320AIC24KI的Datasheet PDF文件第4页浏览型号TLV320AIC24KI的Datasheet PDF文件第5页浏览型号TLV320AIC24KI的Datasheet PDF文件第6页浏览型号TLV320AIC24KI的Datasheet PDF文件第7页 
TLV320AIC20, TLV320AIC21  
TLV320AIC24, TLV320AIC25  
TLV320AIC20K, TLV320AIC24K  
www.ti.com  
SLAS363DMARCH 2002REVISED APRIL 2005  
Low-Power, Highly-Integrated, Programmable  
16-Bit, 26-KSPS, Dual-Channel CODEC  
FEATURES  
Differential and Single-Ended Analog  
Input/Output  
Stereo 16-Bit Oversampling Sigma-Delta A/D  
Converter  
Built-In Analog Functions:  
– Analog and Digital Sidetone  
– Antialiasing Filter (AAF)  
Stereo 16-Bit Oversampling Sigma-Delta D/A  
Converter  
Support Maximum Master Clock of 100 MHz to  
Allow DSPs Output Clock to be Used as a  
Master Clock  
– Programmable Input and Output Gain  
Control (PGA)  
– Microphone/Handset/Headset Amplifiers  
Selectable FIR/IIR Filter With Bypassing  
Option  
– AIC20/21/20K Have a Built-In 8-Speaker  
Driver  
Programmable Sampling Rate up to:  
– Max 26 Ksps With On-Chip IIR/FIR Filter  
– Max 104 Ksps With IIR/FIR Bypassed  
– Power Management With Hardware/Software  
Power-Down Modes 30 µW  
Separate Software Control for ADC and DAC  
Power Down  
Fully Compatible With Common TMS320® DSP  
Family and Microcontroller Power Supplies  
On-Chip FIR Produced 84-dB SNR for ADC  
and 92-dB SNR for DAC over 13-Khz BW  
Smart Time Division Multiplexed (SMARTDM®)  
Serial Port  
– 1.65-V - 1.95-V Digital Core Power  
– 1.1-V - 3.6-V Digital I/O  
– Glueless 4-Wire Interface to DSP  
– Automatic Cascade Detection (ACD)  
Self-Generates Master/Slave Device  
Addresses  
– 2.7-V - 3.6-V Analog  
Internal Reference Voltage (Vref  
)
2s Complement Data Format  
– Programming Mode to Allow On-The-Fly  
Reconfiguration  
Test Mode Which Includes Digital Loopback  
and Analog Loopback  
– Continuous Data Transfer Mode to Minimize  
Bit Clock Speed  
APPLICATIONS  
– Support Different Sampling Rate for Each  
Device  
Wireless Accessories  
Hands-Free Car Kits  
VOIP  
Cable Modem  
Speech Processing  
– Turbo Mode to Maximize Bit Clock For  
Faster Data Transfer and Allow Multiple  
Serial Devices to Share the Same Bus  
– Allows up to Eight Devices to be Connected  
to a Single Serial Port  
Host port  
– 2-Wire Interface  
– Selectable I2C or S2C  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SMARTDM, TMS320, TMS320C5000, TMS320C6000 are registered trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2002–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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