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TLV320AIC15C PDF预览

TLV320AIC15C

更新时间： 2024-11-23 13:02:47
品牌 Logo 应用领域
德州仪器 - TI 解码器编解码器
页数 文件大小 规格书
63页 1160K
描述
SPECIALTY CONSUMER CIRCUIT, PDSO30, PLASTIC, TSSOP-30

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中文翻译

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TLV320AIC15C 技术参数

生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP,针数：30
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.68Is Samacsys：N
其他特性：IT ALSO REQUIRES 1.65V TO 1.95V SUPPLY商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：R-PDSO-G30长度：7.8 mm
功能数量：1端子数量：30
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
表面贴装：YES温度等级：COMMERCIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL宽度：4.4 mm
Base Number Matches：1

TLV320AIC15C 数据手册

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TLV320AIC12, TLV320AIC13  
TLV320AIC14, TLV320AIC15  
TLV320AIC12K, TLV320AIC14K  
www.ti.com  
SLWS115E–OCTOBER 2001–REVISED JANUARY 2007  
LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE  
16-Bit, 26-KSPS MONO CODEC  
FEATURES  
–
–
–
Analog and Digital Sidetone  
•
•
•
Mono 16-Bit Oversampling Sigma-Delta A/D  
Converter  
Antialiasing Filter (AAF)  
Programmable Input and Output Gain  
Control (PGA)  
Mono 16-Bit Oversampling Sigma-Delta D/A  
Converter  
–
–
–
Microphone/Handset/Headset Amplifiers  
Support Maximum Master Clock of 100 MHz to  
Allow the DSP Output Clock to be Used as a  
Master Clock  
AIC12K has an 8-Ω Speaker Driver  
Power Management With  
Hardware/Software Power-Down Modes  
30 µW  
•
•
Selectable FIR/IIR Filter With Bypassing  
Option  
•
•
Separate Software Control for ADC and DAC  
Power Down  
Programmable Sampling Rate up to:  
–
–
Max 26 Ksps With On-Chip IIR/FIR Filter  
Max 104 Ksps With IIR/FIR Bypassed  
Fully Compatible With Common TMS320™  
DSP Family and Microcontroller Power  
Supplies  
•
•
On-Chip FIR Produced 84-dB SNR for ADC  
and 92-dB SNR for DAC  
–
–
–
1.65 V - 1.95 V Digital Core Power  
1.1 V - 3.6 V Digital I/O  
Smart Time Division Multiplexed  
(SMARTDM™) Serial Port  
2.7 V - 3.6 V Analog  
–
–
Glueless 4-Wire Interface to DSP  
•
Power Dissipation (PD)  
Automatic Cascade Detection (ACD)  
Self-Generates Master/Slave Device  
Addresses  
–
–
11.2 mW at 3.3 V in Standard Operation  
17.8 mW at 3.3 V With Headphone Drivers  
•
•
•
Internal Reference Voltage (Vref  
)
–
–
–
–
Programming Mode to Allow On-the-Fly  
Reconfiguration  
2s Complement Data Format  
Test Modes Which Include Digital Loopback  
and Analog Loopback  
Continuous Data Transfer Mode to  
Minimize Bit Clock Speed  
Support Different Sampling Rate for Each  
Device  
APPLICATIONS  
•
•
•
•
•
Digital Still Cameras  
Wireless Accessories  
Hands-Free Car Kits  
VOIP  
Turbo Mode to Maximize Bit Clock for  
Faster Data Transfer and Allow Multiple  
Serial Devices to Share the Same Bus  
–
Allows up to 16 Devices to be Connected  
to a Single Serial Port  
Cable Modem  
•
Host Port  
–
–
2-Wire Interface  
Selectable I2C or S2C  
•
•
Differential and Single-Ended Analog  
Input/Output  
Built-In Analog Functions:  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SMARTDM, TMS320C5000, TMS320C6000 are trademarks of Texas Instruments.  
TMS320 is a trademark of Texas Instrument.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2001–2007, Texas Instruments Incorporated  
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