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TLV320ADC3101IRGET PDF预览

TLV320ADC3101IRGET

更新时间: 2024-11-23 06:02:15
品牌 Logo 应用领域
德州仪器 - TI 消费电路商用集成电路手机便携式PC无线
页数 文件大小 规格书
84页 1174K
描述
Low Power Stereo ADC for Wireless Handsets and Portable Audio

TLV320ADC3101IRGET 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:VQFN-24针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.76Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:232663
Samacsys Pin Count:25Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Quad Flat No-LeadSamacsys Footprint Name:RGE(S-PVQFN-N24)
Samacsys Released Date:2015-09-03 14:00:42Is Samacsys:N
其他特性:IT ALSO REQUIRES 1.65V TO 1.95V DIGITAL SUPPLY商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-PQCC-N24JESD-609代码:e4
长度:3 mm湿度敏感等级:2
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.6 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmBase Number Matches:1

TLV320ADC3101IRGET 数据手册

 浏览型号TLV320ADC3101IRGET的Datasheet PDF文件第2页浏览型号TLV320ADC3101IRGET的Datasheet PDF文件第3页浏览型号TLV320ADC3101IRGET的Datasheet PDF文件第4页浏览型号TLV320ADC3101IRGET的Datasheet PDF文件第5页浏览型号TLV320ADC3101IRGET的Datasheet PDF文件第6页浏览型号TLV320ADC3101IRGET的Datasheet PDF文件第7页 
TLV320ADC3101  
www.ti.com ........................................................................................................................................................................................... SLAS553NOVEMBER 2008  
Low Power Stereo ADC for Wireless Handsets and Portable Audio  
1
FEATURES  
APPLICATIONS  
Wireless Handsets  
Portable Low Power Audio Systems  
Noise Cancellation Systems  
Front-End Voice or Audio Processor for Digital  
Audio  
2
Stereo Audio ADC  
92-dBA Signal-to-Noise Ratio  
Supports ADC Sample Rates From 8 kHz to  
96 kHz  
Flexible Digital Filtering with RAM  
Programmable Coefficient, Instructions, and  
Built-In Standard Modes  
DESCRIPTION  
The TLV320ADC3101 is a low power, stereo audio  
Analog to Digital Converter (ADC) supporting  
sampling rates from 8 kHz to 96 kHz with an  
integrated programmable gain amplifier providing up  
to 40dB analog gain or AGC. Front-end input coarse  
attenuation of 0dB, –6dB, or off, is also provided. The  
Low Latency IIR Filters for Voice  
Linear Phase FIR Filters for Audio  
Additional Programmable IIR Filters for EQ,  
Noise Cancellation or Reduction  
Up to 128 Programmable ADC Digital Filter  
Coefficients  
inputs are programmable in  
a combination of  
single-ended or fully differential configurations.  
Extensive register-based power control is available  
via I2C, enabling mono or stereo recording. Low  
power consumption makes the TLV320ADC3101  
ideal for battery-powered portable equipment.  
Six Audio Inputs With Configurable Automatic  
Gain Control (AGC)  
Programmable in Single-Ended or Fully  
Differential Configurations  
Can be 3-Stated for Easy Interoperability  
With Other Audio ICs  
The AGC programs to a wide range of attack  
(7ms – 1.4s) and decay (50ms – 22.4s) times. A  
programmable noise gate function is included to  
avoid noise pumping. Low-latency IIR filters optimized  
for voice and telephony are available, as well as  
linear-phase FIR filters optimized for audio.  
Programmable IIR filters are also available and may  
be used for sound equalization, or to remove noise  
components. The audio serial bus can be  
Low Power Consumption and Extensive  
Modular Power Control:  
6-mW Mono Record 8-kHz  
11-mW Stereo Record, 8-kHz  
10-mW Mono Record, 48-kHz  
17-mW Stereo Record, 48-kHz  
programmed  
to  
support  
I2S,  
Left-justified,  
Dual Programmable Microphone Bias  
Programmable PLL for Clock Generation  
I2C™ Control Bus  
Audio Serial Data Bus Supports I2S,  
Left/Right-Justified, DSP, PCM, and TDM  
Modes  
Right-justified, DSP, PCM, and TDM modes. The  
audio bus may be operated in either master or slave  
mode.  
A programmable integrated PLL is included for  
flexible clock generation and support for all standard  
audio rates from a wide range of available MCLKs,  
varying from 512 kHz to 50 MHz, including the most  
popular cases of 12-MHz, 13-MHz, 16-MHz,  
19.2-MHz, and 19.68-MHz system clocks.  
Digital Microphone Input Support  
Two GPIOs  
Power Supplies:  
Analog: 2.6 V–3.6 V.  
Digital: Core: 1.65 V–1.95 V,  
I/O: 1.1 V–3.6 V  
4mm × 4mm 24-Pin RGE (QFN)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
I2C is a trademark of Phillips Electronics.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008, Texas Instruments Incorporated  

TLV320ADC3101IRGET 替代型号

型号 品牌 替代类型 描述 数据表
TLV320ADC3101IRGER TI

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