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TLE7230G PDF预览

TLE7230G

更新时间: 2024-11-23 22:31:23
品牌 Logo 应用领域
英飞凌 - INFINEON 开关
页数 文件大小 规格书
16页 799K
描述
Smart Octal Low-Side Switch

TLE7230G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP24,.4
针数:24Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:8.4内置保护:TRANSIENT; OVER CURRENT; THERMAL
驱动器位数:8接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:15.6 mm湿度敏感等级:3
功能数量:1端子数量:24
输出电流流向:SINK标称输出峰值电流:1 A
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
筛选级别:AEC-Q100座面最大高度:2.65 mm
子类别:Peripheral Drivers最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:MOS
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED断开时间:60 µs
接通时间:60 µs宽度:7.6 mm
Base Number Matches:1

TLE7230G 数据手册

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Target Datasheet TLE7230 R/G  
Smart Octal Low-Side Switch  
Features  
Product Summary  
Full Protection  
Supply voltage  
Drain source clamping voltage VDS(AZ)max 60  
On resistance RON 0.8  
VS  
4.5 – 5.5 V  
Overload  
Overtemperature  
V
Overvoltage  
Low Quiescent Current< 10µA  
16 bit SPI (for Daisychain)  
Direct Parallel Control of Four Channels  
PWM input (demux)  
Parallel Inputs High or Low Active Programmable  
Programmable functions  
Boollean operation  
Overload behavior  
Power P-DSO 36  
P-DSO-24  
Overtemperature behavior  
Switching time  
General Fault Flag  
Digital Ports Compatible to 5V and 3,3 V Micro Controllers  
Electostatic Discharge (ESD) Protection  
Full reverse current capability without latchup or loss of function  
General description  
Detailed Block Diagram  
VDO  
VS  
PRG  
RESET  
FAULT  
GND  
VS  
Octal Low-Side Switch in  
VBB  
Smart  
Power  
Technology  
Protection  
Functions  
IN1  
(SPT) with a Serial Peripheral  
Interface (SPI) and eight open  
drain DMOS output stages.  
The TLE 7230 R/G is pro-  
tected by embedded protec-  
tion functions and designed for  
automotive applications.  
as Ch. 1  
LOGIC  
IN2  
IN3  
IN4  
as Ch. 1  
as Ch. 1  
OUT1  
Output Stage  
16  
4
1
SCLK  
SI  
8
8
Output Control  
Buffer  
Serial Interface  
OUT8  
SPI  
CS  
SO  
GND  
V1.1  
Page  
12. Oct. 2003  
1

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