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TLE2426MPR PDF预览

TLE2426MPR

更新时间: 2024-11-26 13:14:47
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
22页 345K
描述
SPECIALTY ANALOG CIRCUIT, PDIP8, PLASTIC, DIP-8

TLE2426MPR 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:8
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.04模拟集成电路 - 其他类型:ANALOG CIRCUIT
JESD-30 代码:R-PDIP-T8长度:9.81 mm
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):40 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):5 V表面贴装:NO
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

TLE2426MPR 数据手册

 浏览型号TLE2426MPR的Datasheet PDF文件第2页浏览型号TLE2426MPR的Datasheet PDF文件第3页浏览型号TLE2426MPR的Datasheet PDF文件第4页浏览型号TLE2426MPR的Datasheet PDF文件第5页浏览型号TLE2426MPR的Datasheet PDF文件第6页浏览型号TLE2426MPR的Datasheet PDF文件第7页 
TLE2426, TLE2426Y  
THE “RAIL SPLITTER”  
PRECISION VIRTUAL GROUND  
SLOS098D – AUGUST 1991 – REVISED MAY 1998  
1/2 V Virtual Ground for Analog Systems  
I
Self-Contained 3-terminal TO-226AA  
Package  
Excellent Output Regulation  
45 µV Typ at I = 0 to 10 mA  
O
– +15 µV Typ at I = 0 to +10 mA  
O
Low-Impedance Output . . . 0.0075 Typ  
Micropower Operation . . . 170 µA Typ,  
V = 5 V  
Noise Reduction Pin (D, JG, and P  
Packages Only)  
I
Wide V Range . . . 4 V to 40 V  
I
High Output-Current Capability  
– Source . . . 20 mA Typ  
– Sink . . . 20 mA Typ  
INPUT/OUTPUT TRANSFER CHARACTERISTICS  
10  
V
I
V
I
V
O
V
I
description  
V
8
6
4
O
2
In signal-conditioning applications utilizing a  
single power source, a reference voltage equal to  
one-half the supply voltage is required for  
termination of all analog signal grounds. Texas  
Instruments presents a precision virtual ground  
whose output voltage is always equal to one-half  
the input voltage, the TLE2426 “rail splitter.”  
V
O
The unique combination of a high-performance,  
micropower operational amplifier and a precision-  
trimmed divider on a single silicon chip results in  
2
0
a precise V /V ratio of 0.5 while sinking and  
O
I
sourcing current. The TLE2426 provides a low-  
impedance output with 20 mA of sink and source  
capability while drawing less than 280 µA  
0
0.25  
0.5  
0.75  
1
t – Time – s  
of supply current over the full input range of 4 V to 40 V. A designer need not pay the price in terms of board  
space for a conventional signal ground consisting of resistors, capacitors, operational amplifiers, and voltage  
references. The performance and precision of the TLE2426 is available in an easy-to-use, space saving,  
3-terminal LP package. For increased performance, the optional 8-pin packages provide a noise-reduction pin.  
With the addition of an external capacitor (C ), peak-to-peak noise is reduced while line ripple rejection is  
NR  
improved.  
Initial output tolerance for a single 5-V or 12-V system is better than 1% with 3.6% over the full 40-V input range.  
Ripple rejection exceeds 12 bits of accuracy. Whether the application is for a data acquisition front end, analog  
signal termination, or simply a precision voltage reference, the TLE2426 eliminates a major source of system  
error.  
AVAILABLE OPTIONS  
PACKAGED DEVICES  
CHIP  
SMALL  
OUTLINE  
(D)  
CERAMIC  
DIP  
PLASTIC  
DIP  
FORM  
(Y)  
PLASTIC  
(LP)  
T
A
(JG)  
(P)  
0°C to 70°C  
40°C to 85°C  
55°C to 125°C  
TLE2426CD  
TLE2426ID  
TLE2426MD  
TLE2426CLP  
TLE2426ILP  
TLE2426MLP  
TLE2426CP  
TLE2426IP  
TLE2426MP  
TLE2426Y  
TLE2426MJG  
The D and LP packages are available taped and reeled in the commercial temperature range only. Add R suffix  
to the device type (e. g., TLC2426CDR). Chips are tested at 25°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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