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TLC976CDGG PDF预览

TLC976CDGG

更新时间: 2024-11-16 03:59:27
品牌 Logo 应用领域
德州仪器 - TI 消费电路商用集成电路光电二极管
页数 文件大小 规格书
17页 220K
描述
10-BIT, 20 MSPS, AREA CCD SIGNAL PROCESSOR

TLC976CDGG 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:PLASTIC, TSSOP-56
针数:56Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.71Is Samacsys:N
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:R-PDSO-G56
长度:14 mm功能数量:1
端子数量:56最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.2 mm
最大压摆率:41 mA最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V表面贴装:YES
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

TLC976CDGG 数据手册

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TLC976C  
10-BIT, 20 MSPS, AREA CCD SIGNAL PROCESSOR  
SLAS193 – OCTOBER 1998  
DGG PACKAGE  
(TOP VIEW)  
Correlated Double Sampling (CDS), AGC  
and High Speed 10-Bit ADC in a Single  
Package  
SHV  
GND1  
SHR  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
5-V Analog Power Supply and 3.3-V Digital  
Power Supply  
VCC1  
2
BLK-PULSE  
OFFSET  
VCC3  
CLP2  
3
Power Down Mode  
DATA-IN  
PIN  
4
5
56-Pin TSSOP (DGG) Package with  
Multichip Module Assembly for Isolation  
DRIVE-OUT  
GND3  
AGCGAIN  
OBCLP  
AGCCLP  
SH-PULSE  
GND2  
6
7
CDS-STBY  
VRB-OUT  
VRT-OUT  
A-SUB  
8
CDS/AGC  
9
AGC Gain Range of 5 dB to 39 dB  
Black Level Clamp Circuit  
10  
11  
VCC2  
Direct Connection to ADC Input  
Voltage Reference for ADC  
D-SUB 12  
DVSS 13  
D0 14  
45 A-SUB  
44 DVDD  
43 AVSS  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
D1  
D2  
AVSS  
VIN  
Analog-to-Digital Converter  
10-Bit Resolution  
D3  
D-SUB  
AVSS  
VRB-IN  
VRB-IN  
VRT-IN  
VRT-IN  
AVSS  
AVDD  
AVDD  
AD-STBY  
OE  
Maximum Conversion Rate . . . 20 MSPS  
(MIN)  
D4  
DVSS  
DVDD  
D5  
Differential Nonlinearity . . . 0.75 LSB (TYP)  
Analog Input Voltage Range of 2 Vp-p  
3.3 V CMOS Digital Interface  
D6  
D7  
D8  
Applications  
D9  
PC Camera  
RESET  
DVSS  
AVDD  
Digital Camera  
Camcorder  
CLK  
CCD Scanner  
description  
The TLC976 is a multichip module (MCM) subsystem designed for interfacing Charge-Coupled Device (CCD)  
in camcorder and digital camera systems. The TLC976 includes correlated double sampler (CDS), automatic  
gain control (AGC), black level clamp circuit, 10 bit, 20 MSPS analog-to-digital converter (ADC), and internal  
reference voltage generator for ADC.  
The CDS/AGC can be connected directly to the ADC input or a separate signal can be connected directly to  
the ADC input. A power-down mode is provided.  
Assembled using the MCM process, the TLC976 provides isolation between the noisy digital domain and the  
noise sensitive analog signals. The CDS/PGA, black level clamps are on one die and the ADC is on a separate  
die. The separate dies significantly reduce the substrate noise to the analog section.  
The TLC976 comes in a 56-pin TSSOP package with 0,50 mm pin pitch. This is about 25% smaller than using  
two separate 32-pin quad flat packs (QFP).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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