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TLC59212

更新时间: 2024-11-05 11:49:39
品牌 Logo 应用领域
德州仪器 - TI 驱动器
页数 文件大小 规格书
9页 284K
描述
8-BIT OPEN-COLLECTOR SINK DRIVER WITH LATCH

TLC59212 数据手册

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TLC59212  
www.ti.com .................................................................................................................................................................................................. SCLS713MARCH 2009  
8-BIT OPEN-COLLECTOR SINK DRIVER WITH LATCH  
1
FEATURES  
N OR PW PACKAGE  
LBC3S (Lin BiCMOS) Process  
High Voltage Output (VOUT = 24 V)  
Output Current (IOL Max = 40 mA)  
(TOP VIEW)  
V
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CLR  
D1  
CC  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
GND  
Latch-Up Performance Exceeds 250 mA Per  
JEDEC Standard JESD-17  
3
D2  
4
D3  
5
D4  
ESD Protection Exceeds JESD 22  
6
D5  
2000-V Human Body Model (A114-A)  
200-V Machine Model (A115-A)  
7
D6  
8
D7  
9
D8  
1000-V Charged Device Model (C101)  
10  
CLK  
DESCRIPTION  
The TLC59212 is an 8-bit open-collector driver with latch designed for 5-V VCC operation.  
These circuits are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input. Information at the data  
(D) input meeting the setup time requirements is transferred to the Y output on the positive-going edge of the  
clock (CLK) pulse. Clock triggering occcurs at a particular voltage level and is not directly related to the transition  
time of the positive-going pulse. When CLK is at either the high or low level, the D-input has no effect at the  
output.  
The TLC59212 is characterized for operation from –40°C to 85°C.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
Reel of 1000  
Reel of 2000  
ORDERABLE PART NUMBER  
TLC59212IN  
TOP-SIDE MARKING  
Y59212  
PDIP – N  
–40°C to 85°C  
TSSOP – PW  
TLC59212IPWR  
Y59212  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
FUNCTION TABLE  
(EACH LATCH)(1)  
INPUTS  
OUTPUT  
Y
CLR  
L
CLK  
D
X
L
X
L
H*  
H*  
L
H
H
H
X
X
H
Y0  
Y0  
H
(1) L: Low-level  
H: High-level  
H*: with pullup resistor  
X: Irrelevant  
: Rising edge  
: Falling edge  
Z : High-impedance (OFF)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009, Texas Instruments Incorporated  

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