TLC551Y

更新时间： 2024-09-16 22:49:43

品牌	Logo	应用领域
德州仪器 - TI		模拟波形发生功能信号电路
页数	文件大小	规格书
16页	278K
描述
LinCMOSE TIMERS

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TLC551Y 技术参数

生命周期：	Obsolete	零件包装代码：	DIE
包装说明：	DIE-8	针数：	8
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.72
Is Samacsys：	N	模拟集成电路 - 其他类型：	PULSE; RECTANGULAR
JESD-30 代码：	X-XUUC-N8	功能数量：	1
端子数量：	8	最高工作温度：	70 °C
最低工作温度：		最大输出频率：	1.2 GHz
封装主体材料：	UNSPECIFIED	封装代码：	DIE
封装形状：	UNSPECIFIED	封装形式：	UNCASED CHIP
认证状态：	Not Qualified	最大供电电压 (Vsup)：	15 V
最小供电电压 (Vsup)：	1 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	NO LEAD
端子位置：	UPPER	Base Number Matches：	1

TLC551Y 数据手册

TLC551, TLC551Y

LinCMOS TIMERS

SLFS044B – FEBRUARY 1984 – REVISED SEPTEMBER 1997

D, DB, P, OR PW PACKAGE

(TOP VIEW)

Very Low Power Consumption

1 mW Typ at V = 5 V

Capable of Operation in Astable Mode

GND

TRIG

OUT

DISCH

THRES

CONT

CMOS Output Capable of Swinging Rail

to Rail

RESET

High Output-Current Capability

Sink 100 mA Typ

functional block diagram

Source 10 mA Typ

CONT

Output Fully Compatible With CMOS, TTL,

and MOS

RESET

Low Supply Current Reduces Spikes

During Output Transitions

THRES

TRIG

OUT

Single-Supply Operation From 1 V to 15 V

Functionally Interchangeable With the

NE555; Has Same Pinout

ESD Protection Exceeds 2000 V Per

MIL-STD-883C, Method 3015.2

DISCH

description

GND

The TLC551 is a monolithic timing circuit

fabricated using the TI LinCMOS process. The

RESET can override TRIG, which can override THRES.

timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2 MHz. Compared

to the NE555 timer, this device uses smaller timing capacitors because of its high input impedance. As a result,

more accurate time delays and oscillations are possible. Power consumption is low across the full range of

power supply voltage.

Like the NE555, the TLC551 has a trigger level equal to approximately one-third of the supply voltage and a

threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of

the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is

set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the

threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs

and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low.

Whenever the output is low, a low-impedance path is provided between DISCH and GND. All unused inputs

should be tied to an appropriate logic level to prevent false triggering.

Whilethe CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC551 exhibits greatly

reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling

capacitors required by the NE555.

The TLC551C is characterized for operation from 0°C to 70°C.

This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These

circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,

Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated

voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device

should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level,

preferably either supply voltage or ground. Specific guidelines for handling devices of this type are contained in the publication

Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.

LinCMOS is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...16

中文翻译

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与TLC551Y相关器件

型号	品牌	获取价格	描述	数据表
TLC552	TI	获取价格	DUAL LINCMOSE TIMER
TLC552C	TI	获取价格	DUAL LINCMOSE TIMER
TLC552C_06	TI	获取价格	DUAL LINCMOSE⑩ TIMER
TLC552CD	TI	获取价格	DUAL LINCMOSE TIMER
TLC552CD1	TI	获取价格	IC IC,TIMER,CMOS,SOP,14PIN,PLASTIC, Timer or RTC
TLC552CD3	TI	获取价格	IC IC,TIMER,CMOS,SOP,14PIN,PLASTIC, Timer or RTC
TLC552CDG4	TI	获取价格	DUAL LINCMOSE⑩ TIMER
TLC552CDP1	TI	获取价格	IC IC,TIMER,CMOS,SOP,14PIN,PLASTIC, Timer or RTC
TLC552CDR	TI	获取价格	DUAL LINCMOSE⑩ TIMER
TLC552CDRG4	TI	获取价格	DUAL LINCMOSE⑩ TIMER

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