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TLC32040MJ PDF预览

TLC32040MJ

更新时间: 2024-11-29 22:49:47
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德州仪器 - TI /
页数 文件大小 规格书
30页 202K
描述
ANALOG INTERFACE CIRCUIT

TLC32040MJ 数据手册

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TLC32040M  
ANALOG INTERFACE CIRCUIT  
SGLS031 – MAY 1990  
Advanced LinCMOS Silicon-Gate Process  
J PACKAGE  
(TOP VIEW)  
Technology  
14-Bit Dynamic Range ADC and DAC  
NU  
RESET  
EODR  
NU  
NU  
IN+  
IN–  
AUX IN+  
AUX IN–  
OUT+  
OUT–  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
Variable ADC and DAC Sampling Rate up to  
2
19200 Samples Per Second  
3
Switched-Capacitor Antialiasing Input Filter  
FSR  
DR  
MSTR CLK  
4
and Output-Reconstruction Filter  
5
Serial Port for Direct Interface to  
SMJ320E14, SMJ32020, SMJ320C25, and  
SMJ320C30 Digital Processors  
6
V
7
DD  
REF  
DGTL GND  
SHIFT CLK  
EODX  
8
Synchronous or Asynchronous ADC and  
DAC Conversion Rates With Programmable  
Incremental ADC and DAC Conversion  
Timing Adjustments  
V
9
CC+  
V
10  
11  
12  
13  
14  
CC–  
ANLG GND  
ANLG GND  
NU  
DX  
Serial Port Interface to SN54299  
WORD/BYTE  
FSX  
Serial-to-Parallel Shift Register for Parallel  
Interface to SMJ320C10, SMJ320C15,  
SMJ320E15, or Other Digital Processors  
NU  
FK PACKAGE  
(TOP VIEW)  
description  
The TLC32040M interface circuit is a complete  
analog-to-digital and digital-to-analog input/  
output system on a single monolithic CMOS  
4
3 2 1 28 27 26  
chip. This device integrates  
switched-capacitor antialiasing input filter, a  
14-bit-resolution A/D converter, four  
a
band-pass  
5
DR  
MSTR CLK  
IN–  
AUX IN+  
AUX IN–  
25  
24  
23  
6
7
V
DD  
microprocessor-compatible serial port modes, a  
14-bit-resolution D/A converter, and a low-pass  
switched-capacitor output reconstruction filter.  
The device offers numerous combinations of  
master clock input frequencies and conversion/  
sampling rates, which can be changed via digital  
processor control.  
8
REF  
DGTL GND  
SHIFT CLK  
EODX  
22 OUT+  
21 OUT–  
9
10  
11  
20  
V
V
CC+  
CC–  
19  
12 13 14 15 16 17 18  
Typical applications for this integrated circuit  
include modems (7.2-, 8-, 9.6-, 14.4-, and  
19.2-kHz sampling rate), analog interface for  
digital signal processors (DSPs), speech recognition/storage systems, industrial process control, biomedical  
NUNonusable; no external connection should be made to  
these pins.  
instrumentation, acoustical signal processing, spectral analysis, data acquisition, and instrumentation  
recorders. Four serial modes, which allow direct interface to the SMJ320E14, SMJ32020, SMJ320C25, and  
SMJ320C30 digital signal processors, are provided. Also, when the transmit and receive sections of the analog  
interface circuit (AIC) are operating synchronously, it will interface to two SN54299 serial-to-parallel shift  
registers.These serial-to-parallel shift registers can then interface in parallel to the SMJ320C10, SMJ320C15,  
SMJ320E15, other digital signal processors, or external FIFO circuitry. Output data pulses are emitted to inform  
the processor that data transmission is complete or to allow the DSP to differentiate between two transmitted  
bytes. A flexible control scheme is provided so that the functions of the integrated circuit can be selected and  
adjusted coincidentally with signal processing via software control.  
Advanced LinCMOS is a trademark of Texas Instruments Incorporated.  
PRODUCTION DATA information is current as of publication date.  
Copyright 1990, Texas Instruments Incorporated  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
4–1  

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