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TLC2558QDWR

更新时间： 2024-11-27 13:14:43
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德州仪器 - TI 转换器
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TLC2554, TLC2558  
5-V, 12-BIT, 400 KSPS, 4/8 CHANNEL, LOW POWER,  
SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN  
SLAS220A –JUNE 1999  
Maximum Throughput 400 KSPS  
Analog Input Range 0 V to Supply Voltage  
With 500 kHz BW  
Built-In Reference and 8× FIFO  
Hardware Controlled and Programmable  
Sampling Period  
Differential/Integral Nonlinearity Error:  
±1 LSB  
Low Operating Current (4 mA at 5.5 V  
External Ref, 6 mA at 5.5 V, Internal Ref)  
Signal-to-Noise and Distortion Ratio:  
69 dB, f = 12 kHz  
i
Power Down: Software/Hardware  
Power-Down Mode (1 µA Max, Ext Ref),  
Auto Power-Down Mode (1 µA, Ext Ref)  
Spurious Free Dynamic Range: 75 dB,  
f = 12 kHz  
i
SPI/DSP-Compatible Serial Interfaces With  
SCLK up to 20 MHz  
Programmable Auto-Channel Sweep  
Single Supply 5 Vdc  
D OR PW PACKAGE  
(TOP VIEW)  
DW OR PW PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
9
10  
20 CS  
SDO  
SDI  
CS  
SDO  
SDI  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
19  
18  
17  
16  
15  
14  
13  
12  
11  
REFP  
REFM  
FS  
REFP  
REFM  
FS  
SCLK  
SCLK  
EOC/(INT)  
EOC/(INT)  
V
PWDN  
GND  
V
PWDN  
GND  
CSTART  
A7  
CC  
CC  
A0  
A1  
A2  
A0  
A1  
A2  
A3  
A4  
10 CSTART  
A3  
9
A6  
A5  
description  
The TLC2558 and TLC2554 are a family of high-performance, 12-bit low power, 1.6 µs, CMOS analog-to-digital  
converters (ADC) which operate from a single 5 V power supply. These devices have three digital inputs and  
a 3-state output [chip select (CS), serial input-output clock (SCLK), serial data input (SDI), and serial data output  
(SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI  
interface). When interfaced with a DSP, a frame sync (FS) signal is used to indicate the start of a serial data  
frame.  
In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip analog  
multiplexer that can select any analog inputs or one of three internal self-test voltages. The sample-and-hold  
function is automatically started after the fourth SCLK edge (normal sampling) or can be controlled by a special  
pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be  
programmed as short (12 SCLKs) or as long (24 SCLKs) to accommodate faster SCLK operation popular  
among high-performance signal processors. The TLC2558 and TLC2554 are designed to operate with very low  
power consumption. The power-saving feature is further enhanced with software/hardware/auto power down  
modes and programmable conversion speeds. The converter uses the external SCLK as the source of the  
conversion clock to achieve higher (up to 1.6 µs when a 20 MHz SCLK is used) conversion speed. There is a  
4-V internal reference available. An optional external reference can also be used to achieve maximum flexibility.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...37

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TLC2574IPWRG4 TI

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 		4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20, GREEN, PLASTIC, TSSOP-20
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