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TLC1543QDBLE PDF预览

TLC1543QDBLE

更新时间: 2024-11-20 19:49:47
品牌 Logo 应用领域
德州仪器 - TI 光电二极管转换器
页数 文件大小 规格书
34页 1153K
描述
11-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20, PLASTIC, SO-20

TLC1543QDBLE 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SSOP, SSOP20,.3
针数:20Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.01最大模拟输入电压:5.5 V
最小模拟输入电压:最长转换时间:21 µs
转换器类型:ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码:R-PDSO-G20
长度:7.2 mm最大线性误差 (EL):0.0977%
模拟输入通道数量:11位数:10
功能数量:1端子数量:20
最高工作温度:125 °C最低工作温度:-40 °C
输出位码:BINARY输出格式:SERIAL
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
采样速率:0.038 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:2 mm子类别:Analog to Digital Converters
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

TLC1543QDBLE 数据手册

 浏览型号TLC1543QDBLE的Datasheet PDF文件第2页浏览型号TLC1543QDBLE的Datasheet PDF文件第3页浏览型号TLC1543QDBLE的Datasheet PDF文件第4页浏览型号TLC1543QDBLE的Datasheet PDF文件第5页浏览型号TLC1543QDBLE的Datasheet PDF文件第6页浏览型号TLC1543QDBLE的Datasheet PDF文件第7页 
TLC1542I, TLC1542M, TLC1542Q  
TLC1542C, TLC1543C, TLC1543I, TLC1543Q  
www.ti.com  
SLAS052GMARCH 1992REVISED JANUARY 2006  
10-BIT ANALOG-TO-DIGITAL CONVERTERS  
WITH SERIAL CONTROL AND 11 ANALOG INPUTS  
FEATURES  
DB, DW, J, OR N PACKAGE  
10-Bit Resolution A/D Converter  
(TOP VIEW)  
11 Analog Input Channels  
A0  
A1  
A2  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
Three Built-In Self-Test Modes  
Inherent Sample-and-Hold Function  
Total Unadjusted Error: ±1LSB Max  
On-Chip System Clock  
EOC  
I/O CLOCK  
ADDRESS  
DATA OUT  
A3  
A4  
End-of-Conversion (EOC) Output  
Terminal Compatible With TLC542  
CMOS Technology  
A5  
15 CS  
14  
13  
12  
11  
A6  
A7  
REF+  
REF−  
A10  
A8  
GND  
A9  
DESCRIPTION  
The TLC1542C, TLC1542I, TLC1542M, TLC1542Q,  
TLC1543C, TLC1543I, and TLC1543Q are CMOS  
10-bit switched-capacitor successive-approximation  
analog-to-digital converters. These devices have  
three inputs and a 3-state output [chip select (CS),  
input-output clock (I/O CLOCK), address input  
(ADDRESS), and data output (DATA OUT)] that  
provide a direct 4-wire interface to the serial port of a  
host processor. These devices allow high-speed data  
transfers from the host.  
FK OR FN PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
I/O CLOCK  
ADDRESS  
DATA OUT  
CS  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
In addition to a high-speed A/D converter and  
versatile control capability, these devices have an  
on-chip 14-channel multiplexer that can select any  
one of 11 analog inputs or any one of three internal  
self-test voltages. The sample-and-hold function is  
automatic. At the end of A/D conversion, the  
end-of-conversion (EOC) output goes high to  
indicate that conversion is complete. The converter  
incorporated in the devices features differential  
high-impedance reference inputs that facilitate  
ratiometric conversion, scaling, and isolation of  
analog circuitry from logic and supply noise. A  
REF+  
9 10 11 12 13  
switched-capacitor  
design  
allows  
low-error  
conversion over the full operating free-air  
temperature range.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1992–2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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