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TL16C2552FNR

更新时间： 2024-01-01 22:25:32
品牌 Logo 应用领域
德州仪器 - TI 先进先出芯片
页数 文件大小 规格书
34页 446K
描述
1.8-V to 5-V Dual UART with 16-Byte FIFOs 44-PLCC 0 to 70

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TL16C2552FNR 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN, LCC32,.2SQ,20针数：32
Reach Compliance Code：unknownHTS代码：8542.31.00.01
风险等级：5.76其他特性：ALSO OPERATES AT 1.8V/2.5V/3.3V SUPPLY
地址总线宽度：3边界扫描：NO
最大时钟频率：24 MHz通信协议：ASYNC, BIT
最大数据传输速率：0.1875 MBps外部数据总线宽度：8
JESD-30 代码：S-PQCC-N32长度：5 mm
低功率模式：NO串行 I/O 数：2
端子数量：32最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装等效代码：LCC32,.2SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
电源：2.5/5 V认证状态：Not Qualified
座面最大高度：1 mm子类别：Serial IO/Communication Controllers
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD宽度：5 mm
uPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches：1

TL16C2552FNR 数据手册

 浏览型号TL16C2552FNR的Datasheet PDF文件第2页浏览型号TL16C2552FNR的Datasheet PDF文件第3页浏览型号TL16C2552FNR的Datasheet PDF文件第4页浏览型号TL16C2552FNR的Datasheet PDF文件第5页浏览型号TL16C2552FNR的Datasheet PDF文件第6页浏览型号TL16C2552FNR的Datasheet PDF文件第7页 
TL16C2552  
www.ti.com  
SLWS163A–SEPTEMBER 2005–REVISED JUNE 2006  
1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS  
FEATURES  
•
•
•
False-Start Bit Detection  
•
Programmable Auto-RTS and Auto-CTS  
Complete Status Reporting Capabilities  
•
In Auto-CTS Mode, CTS Controls the  
Transmitter  
3-State Output TTL Drive Capabilities for  
Bidirectional Data Bus and Control Bus  
•
•
In Auto-RTS Mode, RCV FIFO Contents, and  
Threshold Control RTS  
•
•
Line Break Generation and Detection  
Internal Diagnostic Capabilities:  
Serial and Modem Control Outputs Drive a  
RJ11 Cable Directly When Equipment is on  
the Same Power Drop  
– Loopback Controls for Communications  
Link Fault Isolation  
– Break, Parity, Overrun, and Framing Error  
Simulation  
•
•
•
•
•
•
•
Capable of Running With All Existing  
TL16C450 Software  
•
•
Fully Prioritized Interrupt System Controls  
After Reset, All Registers Are Identical to the  
TL16C450 Register Set  
Modem Control Functions (CTS, RTS, DSR,  
DTR, RI, and DCD)  
Up to 24-MHz Clock Rate for up to 1.5-Mbaud  
Operation With VCC = 5 V  
•
•
•
Available in 44-Pin PLCC (FN) or 32-Pin QFN  
(RHB) Packages  
Up to 20-MHz Clock Rate for up to  
1.25-Mbaud Operation With VCC = 3.3 V  
Each UART's Internal Register Set May Be  
Written Concurrently to Save Setup Time  
Up to 16-MHz Clock Rate for up to 1-Mbaud  
Operation With VCC = 2.5 V  
Multi-Function Output (MF) Allows Users to  
Select Among Several Functions, Saving  
Package Pins  
Up to 10-MHz Clock Rate for up to 625-kbaud  
Operation With VCC = 1.8 V  
In the TL16C450 Mode, Hold and Shift  
Registers Eliminate the Need for Precise  
Synchronization Between the CPU and Serial  
Data  
APPLICATIONS  
•
•
•
•
•
•
Point-of-Sale Terminals  
Gaming Terminals  
Portable Applications  
Router Control  
Cellular Data  
Factory Automation  
•
•
Programmable Baud Rate Generator Allows  
Division of Any Input Reference Clock by 1 to  
(216 - 1) and Generates an Internal 16 × Clock  
Standard Asynchronous Communication Bits  
(Start, Stop, and Parity) Added to or Deleted  
From the Serial Data Stream  
DESCRIPTION  
The TL16C2552 is a dual universal asynchronous  
receiver and transmitter (UART). It incorporates the  
functionality of two TL16C550D UARTs, each UART  
having its own register set and FIFOs. The two  
UARTs share only the data bus interface and clock  
source, otherwise they operate independently.  
Another name for the UART function is  
Asynchronous Communications Element (ACE), and  
these terms will be used interchangeably. The bulk  
of this document describes the behavior of each  
ACE, with the understanding that two such devices  
are incorporated into the TL16C2552.  
•
•
•
5-V, 3.3-V, 2.5-V, and 1.8 V Operation  
Independent Receiver Clock Input  
Transmit, Receive, Line Status, and Data Set  
Interrupts Independently Controlled  
•
Fully Programmable Serial Interface  
Characteristics:  
– 5-, 6-, 7-, or 8-Bit Characters  
– Even-, Odd-, or No-Parity Bit Generation  
and Detection  
– 1-, 1 ½-, or 2-Stop Bit Generation  
– Baud Generation (dc to 1 Mbit/s)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2005–2006, Texas Instruments Incorporated  
1234567...34

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