TL16C2550
www.ti.com
SLWS161D–JUNE 2005–REVISED OCTOBER 2006
1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
FEATURES
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False-Start Bit Detection
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Programmable Auto-RTS and Auto-CTS
Complete Status Reporting Capabilities
In Auto-CTS Mode, CTS Controls Transmitter
3-State Output TTL Drive Capabilities for
Bidirectional Data Bus and Control Bus
In Auto-RTS Mode, RCV FIFO Contents, and
Threshold Control RTS
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Line Break Generation and Detection
Internal Diagnostic Capabilities:
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Serial and Modem Control Outputs Drive a
RJ11 Cable Directly When Equipment Is on
the Same Power Drop
– Loopback Controls for Communications
Link Fault Isolation
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Capable of Running With All Existing
TL16C450 Software
– Break, Parity, Overrun, and Framing Error
Simulation
After Reset, All Registers Are Identical to the
TL16C450 Register Set
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Fully Prioritized Interrupt System Controls
Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and DCD)
Up to 24-MHz Clock Rate for up to 1.5-Mbaud
Operation With VCC = 5 V
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Available in 48-Pin TQFP (PFB), 32-Pin QFN
(RHB), or 44-Pin PLCC (FN)(1) Packages
Up to 20-MHz Clock Rate for up to
1.25-Mbaud Operation With VCC = 3.3 V
Pin Compatible with TL16C752B (48-Pin
Package PFB)
Up to 16-MHz Clock Rate for up to 1-Mbaud
Operation With VCC = 2.5 V
(1) Product Preview
Up to 10-MHz Clock Rate for up to 625-kbaud
Operation With VCC = 1.8 V
APPLICATIONS
In the TL16C450 Mode, Hold and Shift
Registers Eliminate the Need for Precise
Synchronization Between the CPU and Serial
Data
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Point-of-Sale Terminals
Gaming Terminals
Portable Applications
Router Control
Cellular Data
Factory Automation
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Programmable Baud Rate Generator Allows
Division of Any Input Reference Clock by 1 to
(216 - 1) and Generates an Internal 16 × Clock
Standard Asynchronous Communication Bits
(Start, Stop, and Parity) Added to or Deleted
From the Serial Data Stream
DESCRIPTION
The TL16C2550 is a dual universal asynchronous
receiver and transmitter (UART). It incorporates the
functionality of two TL16C550D UARTs, each UART
having its own register set and FIFOs. The two
UARTs share only the data bus interface and clock
source, otherwise they operate independently.
Another name for the uart function is Asynchronous
Communications Element (ACE), and these terms
will be used interchangeably. The bulk of this
document describes the behavior of each ACE, with
the understanding that two such devices are
incorporated into the TL16C2550.
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5-V, 3.3-V, 2.5-V, and 1.8-V Operation
Independent Receiver Clock Input
Transmit, Receive, Line Status, and Data Set
Interrupts Independently Controlled
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Fully Programmable Serial Interface
Characteristics:
– 5-, 6-, 7-, or 8-Bit Characters
– Even-, Odd-, or No-Parity Bit Generation
and Detection
– 1-, 1 1/2-, or 2-Stop Bit Generation
– Baud Generation (DC to 1 Mbit/s)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2006, Texas Instruments Incorporated
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