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TL082CP PDF预览

TL082CP

更新时间: 2024-11-21 22:49:47
品牌 Logo 应用领域
美国国家半导体 - NSC 运算放大器放大器电路光电二极管
页数 文件大小 规格书
12页 824K
描述
Wide Bandwidth Dual JFET Input Operational Amplifier

TL082CP 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:DIP包装说明:DIP-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5放大器类型:OPERATIONAL AMPLIFIER
架构:VOLTAGE-FEEDBACK最大平均偏置电流 (IIB):0.0004 µA
25C 时的最大偏置电流 (IIB):0.0004 µA最小共模抑制比:70 dB
标称共模抑制比:100 dB频率补偿:YES
最大输入失调电流 (IIO):0.004 µA最大输入失调电压:20000 µV
JESD-30 代码:R-PDIP-T8JESD-609代码:e0
长度:9.8171 mm低-偏置:YES
低-失调:NO湿度敏感等级:1
负供电电压上限:-18 V标称负供电电压 (Vsup):-15 V
功能数量:2端子数量:8
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):260
电源:+-15 V认证状态:Not Qualified
座面最大高度:5.08 mm最小摆率:8 V/us
标称压摆率:13 V/us子类别:Operational Amplifier
最大压摆率:5.6 mA供电电压上限:18 V
标称供电电压 (Vsup):15 V表面贴装:NO
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40标称均一增益带宽:4000 kHz
最小电压增益:25000宽度:7.62 mm
Base Number Matches:1

TL082CP 数据手册

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April 1998  
TL082  
Wide Bandwidth Dual JFET Input Operational Amplifier  
General Description  
These devices are low cost, high speed, dual JFET input op-  
erational amplifiers with an internally trimmed input offset  
Features  
n Internally trimmed offset voltage: 15 mV  
n Low input bias current: 50 pA  
voltage (BI-FET II technology). They require low supply  
n Low input noise voltage: 16nV/ Hz  
current yet maintain a large gain bandwidth product and fast  
slew rate. In addition, well matched high voltage JFET input  
devices provide very low input bias and offset currents. The  
TL082 is pin compatible with the standard LM1558 allowing  
designers to immediately upgrade the overall performance of  
existing LM1558 and most LM358 designs.  
n Low input noise current: 0.01 pA/ Hz  
n Wide gain bandwidth: 4 MHz  
n High slew rate: 13 V/µs  
n Low supply current: 3.6 mA  
n High input impedance: 1012Ω  
=
<
n Low total harmonic distortion AV 10,:  
0.02%  
These amplifiers may be used in applications such as high  
speed integrators, fast D/A converters, sample and hold cir-  
cuits and many other circuits requiring low input offset volt-  
age, low input bias current, high input impedance, high slew  
rate and wide bandwidth. The devices also exhibit low noise  
and offset voltage drift.  
=
=
RL 10k, VO 20 Vp − p,  
=
BW 20 Hz−20 kHz  
n Low 1/f noise corner: 50 Hz  
n Fast settling time to 0.01%: 2 µs  
Typical Connection  
Connection Diagram  
DIP/SO Package (Top View)  
DS008357-3  
DS008357-1  
Order Number TL082CM or TL082CP  
See NS Package Number M08A or N08E  
Simplified Schematic  
DS008357-2  
BI-FET II is a trademark of National Semiconductor Corp.  
© 1999 National Semiconductor Corporation  
DS008357  
www.national.com  

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