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TL072AIDT PDF预览

TL072AIDT

更新时间: 2024-11-22 12:02:19
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 运算放大器放大器电路光电二极管
页数 文件大小 规格书
16页 323K
描述
Low noise JFET dual operational amplifiers

TL072AIDT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:ROHS COMPLIANT, PLASTIC, MICRO, SOP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.33.00.01风险等级:5.06
Is Samacsys:N放大器类型:OPERATIONAL AMPLIFIER
架构:VOLTAGE-FEEDBACK最大平均偏置电流 (IIB):0.02 µA
25C 时的最大偏置电流 (IIB):0.0002 µA标称共模抑制比:86 dB
频率补偿:YES最大输入失调电流 (IIO):0.004 µA
最大输入失调电压:7000 µVJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:4.9 mm
低-偏置:YES低-失调:NO
负供电电压上限:-18 V标称负供电电压 (Vsup):-15 V
功能数量:2端子数量:8
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:+-15 V
认证状态:Not Qualified座面最大高度:1.75 mm
最小摆率:8 V/us标称压摆率:16 V/us
子类别:Operational Amplifier最大压摆率:2.5 mA
供电电压上限:18 V标称供电电压 (Vsup):15 V
表面贴装:YES技术:BIPOLAR
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
标称均一增益带宽:4000 kHz最小电压增益:25000
宽度:3.9 mmBase Number Matches:1

TL072AIDT 数据手册

 浏览型号TL072AIDT的Datasheet PDF文件第2页浏览型号TL072AIDT的Datasheet PDF文件第3页浏览型号TL072AIDT的Datasheet PDF文件第4页浏览型号TL072AIDT的Datasheet PDF文件第5页浏览型号TL072AIDT的Datasheet PDF文件第6页浏览型号TL072AIDT的Datasheet PDF文件第7页 
TL072, TL072A, TL072B  
Low noise JFET dual operational amplifiers  
Datasheet — production data  
Features  
Wide common-mode (up to VCC+) and  
differential voltage range  
Low input bias and offset current  
Low noise en = 15 nV/Hz (typ)  
Output short-circuit protection  
High input impedance JFET input stage  
Low harmonic distortion: 0.01% (typical)  
Internal frequency compensation  
Latch-up free operation  
N
DIP8  
(Plastic package)  
D
SO-8  
High slew rate: 16 V/µs (typ)  
(Plastic micropackage)  
Description  
The TL072, TL072A and TL072B are high speed  
JFET input dual operational amplifiers  
incorporating well matched, high voltage JFET  
and bipolar transistors in a monolithic integrated  
circuit.  
Pin connections (top view)  
The devices feature high slew rates, low input  
bias and offset current, and low offset voltage  
temperature coefficient.  
1
2
3
4
8
7
6
5
-
+
-
+
1 - Output 1  
2 - Inverting input 1  
3 - Non-inverting input 1  
-
4 - VCC  
5 - Non-inverting input 2  
6 -Inverting input 2  
7 - Output 2  
+
8 - VCC  
July 2012  
Doc ID 2298 Rev 7  
1/16  
This is information on a product in full production.  
www.st.com  
16  

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