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TISP4072F3SL

更新时间: 2024-11-11 20:10:43
品牌 Logo 应用领域
伯恩斯 - BOURNS /
页数 文件大小 规格书
12页 301K
描述
Silicon Surge Protector, 72V V(BO) Max, 6A, PLASTIC, SIP-2

TISP4072F3SL 技术参数

生命周期:Obsolete零件包装代码:SIP
包装说明:IN-LINE, R-PSIP-T2针数:2
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8541.30.00.80风险等级:5.72
其他特性:UL RECOGNIZED最大转折电压:72 V
配置:SINGLE最大断态直流电压:58 V
JESD-30 代码:R-PSIP-T2通态非重复峰值电流:6 A
元件数量:1端子数量:2
最高工作温度:150 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
表面贴装:NO端子形式:THROUGH-HOLE
端子位置:SINGLE触发设备类型:SILICON SURGE PROTECTOR
Base Number Matches:1

TISP4072F3SL 数据手册

 浏览型号TISP4072F3SL的Datasheet PDF文件第2页浏览型号TISP4072F3SL的Datasheet PDF文件第3页浏览型号TISP4072F3SL的Datasheet PDF文件第4页浏览型号TISP4072F3SL的Datasheet PDF文件第5页浏览型号TISP4072F3SL的Datasheet PDF文件第6页浏览型号TISP4072F3SL的Datasheet PDF文件第7页 
TISP4072F3, TISP4082F3  
SYMMETRICAL TRANSIENT  
VOLTAGE SUPPRESSORS  
Copyright © 1997, Power Innovations Limited, UK  
MARCH 1994 - REVISED SEPTEMBER 1997  
TELECOMMUNICATION SYSTEM SECONDARY PROTECTION  
Ion-Implanted Breakdown Region  
Precise and Stable Voltage  
D PACKAGE  
(TOP VIEW)  
Low Voltage Overshoot under Surge  
1
2
3
4
8
7
6
5
R
R
R
R
T
T
T
T
VDRM V(BO)  
DEVICE  
V
V
‘4072F3  
‘4082F3  
58  
66  
72  
82  
MDXXAI  
Specified ratings require the connection  
of pins 1, 2, 3 and 4 for the T terminal.  
Planar Passivated Junctions  
Low Off-State Current < 10 µA  
SL PACKAGE  
(TOP VIEW)  
Rated for International Surge Wave Shapes  
1
2
T
R
ITSP  
WAVE SHAPE  
STANDARD  
A
2/10 µs  
8/20 µs  
FCC Part 68  
ANSI C62.41  
FCC Part 68  
FCC Part 68  
RLM 88  
80  
70  
60  
45  
38  
50  
50  
50  
35  
MDXXAH  
MD4XAA  
10/160 µs  
10/560 µs  
0.5/700 µs  
device symbol  
FTZ R12  
10/700 µs  
VDE 0433  
D PACKAGE  
SL PACKAGE  
CCITT IX K17/K20  
REA PE-60  
T
T
T
T
1
T
10/1000 µs  
4
5
3
2
1
8
Surface Mount and Through-Hole Options  
PACKAGE  
Small-outline  
Small-outline taped  
and reeled  
PART # SUFFIX  
D
DR  
SL  
6
7
2
R
R
R
R
R
SD4XAE  
Single-in-line  
Terminals T and R correspond to the  
alternative line designators of A and B  
UL Recognized, E132482  
description  
These low voltage symmetrical transient voltage  
These monolithic protection devices are  
fabricated in ion-implanted planar structures to  
ensure precise and matched breakover control  
and are virtually transparent to the system in  
normal operation  
suppressor devices are designed to protect two  
wire telecommunication applications against  
transients caused by lightning strikes and a.c.  
power lines. Offered in two voltage variants to  
meet battery and protection requirements they  
are guaranteed to suppress and withstand the  
listed international lightning surges in both  
polarities.  
The small-outline 8-pin assignment has been  
carefully chosen for the TISP series to maximise  
the inter-pin clearance and creepage distances  
which are used by standards (e.g. IEC950) to  
establish voltage withstand ratings.  
Transients are initially clipped by breakdown  
clamping until the voltage rises to the breakover  
level, which causes the device to crowbar. The  
high crowbar holding current prevents d.c.  
latchup as the current subsides.  
P R O D U C T  
I N F O R M A T I O N  
Information is current as of publication date. Products conform to specifications in accordance  
with the terms of Power Innovations standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1

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