TICP206MLP

更新时间： 2024-09-26 10:24:23

品牌	Logo	应用领域
伯恩斯 - BOURNS		三端双向交流开关触发装置
页数	文件大小	规格书
3页	103K
描述
4 Quadrant Logic Level TRIAC, 600V V(DRM), 1.5A I(T)RMS, TO-92, PLASTIC, LP003, 3 PIN

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TICP206MLP 数据手册

TICP206 SERIES

SILICON TRIACS

●

1.5 A RMS

LP PACKAGE

(TOP VIEW)

Glass Passivated Wafer

400 V to 600 V Off-State Voltage

MT2

MT1

Max I of 10 mA

Package Options

MDC2AA

LP PACKAGE

WITH FORMED LEADS

(TOP VIEW)

PACKAGE

PACKING

Bulk

PART # SUFFIX

(None)

LP with fomed leads

Tape and Reel

MT2

MT1

MDC2AB

absolute maximum ratings over operating case temperature (unless otherwise noted)

RATING

Repetitive peak off-state voltage (see Note 1)

Full-cycle RMS on-state current at (or below) 85°C case temperature (see Note 2)

SYMBOL

VALUE

UNIT

TICP206D

TICP206M

400

V_DRM

600

I_T(RMS)

I_TSM

I_GM

1.5

Peak on-state surge current full-sine-wave at (or below) 25°C case temperature (see Note 3)

Peak on-state surge current half-sine-wave at (or below) 25°C case temperature (see Note 4)

Peak gate current

0.2

Average gate power dissipation at (or below) 85°C case temperature (see Note 5)

Operating case temperature range

P_G(AV)

T_C

0.3

°C

-40 to +110

-40 to +125

230

Storage temperature range

T_stg

Lead temperature 1.6 mm from case for 10 seconds

T_L

NOTES: 1. These values apply bidirectionally for any value of resistance between the gate and Main Terminal 1.

2. This value applies for 50-Hz full-sine-wave operation with resistive load. Above 85°C derate linearly to 110°C case temperature at

the rate of 60 mA/°C.

3. This value applies for one 50-Hz full-sine-wave when thedevice is operating at (or below) the rated value of on-state current. Surge

may be repeated after the device has returned to original thermal equilibrium. During the surge, gate control may be lost.

4. This value applies for one 50-Hz half-sine-wave when the device is operating at (or below) the rated value of on-state current.

Surge may be repeated after the device has returned to original thermal equilibrium. During the surge, gate control may be lost.

5. This value applies for a maximum averaging time of 20 ms.

electrical characteristics at 25°C case temperature (unless otherwise noted )

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Repetitive peak off-

state current

I_DRM

V_D= rated V_DRM

I_G= 0

µA

V_supply= +12 V†

V_supply= -12 V†

V_supply= +12 V†

R_L= 10 Ω

t_p(g)> 20 µs

Gate trigger

current

-8

I_GT

-8

2.5

-2.5

2.5

Gate trigger

voltage

V_supply= +12 V†

V_GT

V_supply= -12 V†

† All voltages are with respect to Main Terminal 1.

MARCH 1988 - REVISED SEPTEMBER 2002

Specifications are subject to change without notice.

12 3

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与TICP206MLP相关器件

型号	品牌	获取价格	描述	数据表
TICP206MLPR	BOURNS	获取价格	4 Quadrant Logic Level TRIAC, 600V V(DRM), 1.5A I(T)RMS, PLASTIC, TO-92, 3 PIN
TICP206MR	BOURNS	获取价格	4 Quadrant Logic Level TRIAC, 600V V(DRM), 1.5A I(T)RMS, PLASTIC, LP003, TO-92, 3 PIN
TICP206MR-S	BOURNS	获取价格	4 Quadrant Logic Level TRIAC, 600V V(DRM), 1.5A I(T)RMS, PLASTIC, LP003, TO-92, 3 PIN
TICPAL16L8-55CJ	TI	获取价格	IC,SIMPLE-EPLD,PAL-TYPE,CMOS,DIP,20PIN,CERAMIC
TICPAL16L8-55CJL	TI	获取价格	UV PLD, 55ns, CDIP20
TICPAL16R4-55CJ	TI	获取价格	IC,SIMPLE-EPLD,PAL-TYPE,CMOS,DIP,20PIN,CERAMIC
TICPAL16R8-55CJ	TI	获取价格	IC,SIMPLE-EPLD,PAL-TYPE,CMOS,DIP,20PIN,CERAMIC
TICPAL16R8-55CJL	ROCHESTER	获取价格	UV PLD, 25ns, CMOS, CDIP20, DIP-20
TICPAL16R8-55CJL	TI	获取价格	UV PLD, 25ns, CDIP20
TICPAL16R8-55CN	ROCHESTER	获取价格	OT PLD, 25ns, CMOS, PDIP20, DIP-20

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