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TIBPAL20R4-25CNL PDF预览

TIBPAL20R4-25CNL

更新时间： 2024-11-03 13:14:39
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
17页 185K
描述
OT PLD, 25ns, PQCC28

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中文翻译

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TIBPAL20R4-25CNL 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QCCJ, LDCC28,.5SQReach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.74
其他特性：REGISTER PRELOAD; POWER-UP RESET架构：PAL-TYPE
最大时钟频率：25 MHzJESD-30 代码：S-PQCC-J28
专用输入次数：12I/O 线路数量：4
输入次数：16输出次数：8
产品条款数：64端子数量：28
最高工作温度：75 °C最低工作温度：
组织：12 DEDICATED INPUTS, 4 I/O输出函数：MIXED
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC28,.5SQ封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V可编程逻辑类型：OT PLD
传播延迟：25 ns认证状态：Not Qualified
子类别：Programmable Logic Devices最大供电电压：5.25 V
最小供电电压：4.75 V标称供电电压：5 V
表面贴装：YES技术：TTL
温度等级：COMMERCIAL EXTENDED端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIEDBase Number Matches：1

TIBPAL20R4-25CNL 数据手册

 浏览型号TIBPAL20R4-25CNL的Datasheet PDF文件第2页浏览型号TIBPAL20R4-25CNL的Datasheet PDF文件第3页浏览型号TIBPAL20R4-25CNL的Datasheet PDF文件第4页浏览型号TIBPAL20R4-25CNL的Datasheet PDF文件第5页浏览型号TIBPAL20R4-25CNL的Datasheet PDF文件第6页浏览型号TIBPAL20R4-25CNL的Datasheet PDF文件第7页 
TIBPAL20L8-25C, TIBPAL20R4-25C, TIBPAL20R6-25C, TIBPAL20R8-25C  
LOW-POWER HIGH-PERFORMANCE IMPACT PAL CIRCUITS  
SRPS022 – D2920, MAY 1987 – REVISED MARCH 1992  
TIBPAL20L8’  
JT OR NT PACKAGE  
•
•
Low-Power, High-Performance  
Reduced I of 105 mA Max  
CC  
(TOP VIEW)  
f
:
max  
Without Feedback . . . 33 MHz Min  
With Feedback . . . 25 MHz Min  
I
I
I
I
I
I
I
I
V
I
O
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
O
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CC  
2
t
. . . 25 ns Max  
pd  
3
Direct Replacement for PAL20L8A,  
PAL20R4A, PAL20R6A, PAL20L8A, with at  
Least 50% Reduction in Power  
4
5
6
7
•
•
Preload Capability on Output Registers  
Simplifies Testing  
8
I
I
I
9
10  
11  
12  
Power-Up Clear on Registered Devices (All  
Register Outputs are Set Low, but Voltage  
Levels at the Output Pins Go High)  
I
I
GND  
•
•
Package Options Include Plastic Chip  
Carriers in Addition to Plastic and Ceramic  
DIPs  
TIBPAL20L8’  
FN PACKAGE  
(TOP VIEW)  
Dependable Texas Instruments Quality and  
Reliability  
I/O  
PORT  
S
I
3-STATE  
REGISTERED  
Q OUTPUTS  
4
5
3
2
1
28 27 26  
25  
DEVICE  
INPUTS O OUTPUTS  
I
I
I
I/O  
I/O  
I/O  
PAL20L8  
PAL20R4  
PAL20R6  
PAL20R8  
14  
12  
12  
12  
2
0
0
0
0
6
4
2
0
6
24  
23  
4 (3-state buffers)  
6 (3-state buffers)  
8 (3-state buffers)  
7
8
NC  
22 NC  
21 I/O  
20 I/O  
19 I/O  
9
I
I
I
10  
11  
description  
12 13 14 15 16 17 18  
These programmable array logic devices feature  
high speed and functional equivalency when  
compared with currently available devices. These  
IMPACT  
circuits  
combine  
the  
latest  
NC – No internal connection  
Pin assignments in operating mode  
AdvancedLow-Power Schottky technology with  
proventitanium-tungstenfusestoprovidereliable,  
high-performance substitutes for conventional  
TTL logic. Their easy programmability allows forquick design of custom functions and typically results in a more  
compact circuit board. In addition, chip carriers are available for futher reduction in board space.  
Alloftheregisteroutputsaresettoalowlevelduringpower-up. Extracircuitryhasbeenprovidedtoallowloading  
of each register asynchronously to either a high or low state. This feature simplifies testing because the registers  
can be set to an initial state prior to executing the test sequence.  
The TIBPAL20’ C series is characterized from 0°C to 75°C.  
These devices are covered by U.S. Patent 4,410,987  
IMPACT is a trademark of Texas Instruments Incorporated.  
PAL is a registered trademark of Advanced Micro Devices Inc.  
PRODUCTION DATA information is current as of publication date. Products  
Copyright 1992, Texas Instruments Incorporated  
conform to specifications per the terms of Texas Instruments standard  
warranty. Production processing does not necessarily include testing of all  
parameters.  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1
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