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5962-8951105EA

更新时间: 2024-02-12 21:51:39
品牌 Logo 应用领域
德州仪器 - TI 稳压器开关式稳压器或控制器电源电路开关式控制器脉冲
页数 文件大小 规格书
14页 651K
描述
Regulating Pulse Width Modulators

5962-8951105EA 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.06
Is Samacsys:N模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:VOLTAGE-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:35 V最小输入电压:8 V
标称输入电压:20 VJESD-30 代码:R-GDIP-T16
长度:19.56 mm功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C最大输出电流:0.5 A
最大输出电压:5.15 V最小输出电压:5.05 V
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Qualified
筛选级别:MIL-PRF-38535 Class V座面最大高度:5.08 mm
最大供电电流 (Isup):20 mA标称供电电压 (Vsup):20 V
表面贴装:NO切换器配置:PUSH-PULL
最大切换频率:500 kHz温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

5962-8951105EA 数据手册

 浏览型号5962-8951105EA的Datasheet PDF文件第2页浏览型号5962-8951105EA的Datasheet PDF文件第3页浏览型号5962-8951105EA的Datasheet PDF文件第4页浏览型号5962-8951105EA的Datasheet PDF文件第5页浏览型号5962-8951105EA的Datasheet PDF文件第6页浏览型号5962-8951105EA的Datasheet PDF文件第7页 
application  
INFO  
UC1525B UC1527B  
UC2525B UC2527B  
UC3525B UC3527B  
available  
Regulating Pulse Width Modulators  
FEATURES  
DESCRIPTION  
8 to 35V Operation  
The UC1525B/1527B series of pulse width modulator integrated circuits  
are designed to offer improved performance and lowered external parts  
count when used in designing all types of switching power supplies. The  
on-chip +5.1V buried zener reference is trimmed to ±0.75% and the input  
common-mode range of the error amplifier includes the reference voltage,  
eliminating external resistors. A sync input to the oscillator allows multiple  
units to be slaved or a single unit to be synchronized to an external system  
clock. A single resistor between the CT and the discharge terminals provide  
a wide range of dead time adjustment. These devices also feature built-in  
soft-start circuitry with only an external timing capacitor required. A shut-  
down terminal controls both the soft-start circuitry and the output stages,  
providing instantaneous turn off through the PWM latch with pulsed shut-  
down, as well as soft-start recycle with longer shutdown commands. These  
functions are also controlled by an undervoltage lockout which keeps the  
outputs off and the soft-start capacitor discharged for sub-normal input volt-  
ages. This lockout circuitry includes approximately 500mV of hysteresis for  
jitter-free operation. Another feature of these PWM circuits is a latch follow-  
ing the comparator. Once a PWM pulse has been terminated for any rea-  
son, the outputs will remain off for the duration of the period. The latch is  
reset with each clock pulse. The output stages are totem-pole designs ca-  
pable of sourcing or sinking in excess of 200mA. The UC1525B output  
stage features NOR logic, giving a LOW output for an OFF state. The  
UC1527B utilizes OR logic which results in a HIGH output level when OFF.  
5.1V Buried Zener Reference  
Trimmed to ±0.75%  
100Hz to 500kHz Oscillator Range  
Separate Oscillator Sync Terminal  
Adjustable Deadtime Control  
Internal Soft-Start  
Pulse-by-Pulse Shutdown  
Input Undervoltage Lockout with  
Hysteresis  
Latching PWM to Prevent Multiple  
Pulses  
Dual Source/Sink Output Drivers  
Low Cross Conduction Output Stage  
Tighter Reference Specifications  
BLOCK DIAGRAM  
UDG-95055  
SLUS376 JULY 1995  

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