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100329DM PDF预览

100329DM

更新时间: 2024-02-08 15:57:57
品牌 Logo 应用领域
德州仪器 - TI 输出元件接口集成电路锁存器
页数 文件大小 规格书
14页 283K
描述
OCTAL TTL TO ECL TRANSCEIVER, TRUE OUTPUT, CDIP24, 0.400 INCH, CERAMIC, DIP-24

100329DM 技术参数

生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.61
最大延迟:输入特性:STANDARD
接口集成电路类型:TTL TO ECL TRANSCEIVERJESD-30 代码:R-GDIP-T24
位数:1功能数量:8
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出锁存器或寄存器:REGISTER输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified座面最大高度:5.72 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:NO
技术:BIPOLAR温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:10.16 mm
Base Number Matches:1

100329DM 数据手册

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September 1999  
100329  
Low Power Octal ECL/TTL Bidirectional Translator with  
Register  
The 100329 is designed with FAST® TTL output buffers, fea-  
turing optimal DC drive and capable of quickly charging and  
discharging highly capacitive loads. All inputs have 50 k  
General Description  
The 100329 is an octal registered bidirectional translator de-  
signed to convert TTL logic levels to 100K ECL logic levels  
pull-down resistors.  
and vice versa. The direction of the translation is determined  
by the DIR input. A LOW on the output enable input (OE)  
Features  
n Bidirectional translation  
n ECL high impedance outputs  
n Registered outputs  
holds the ECL outputs in a cut-off state and the TTL outputs  
at a high impedance level. The outputs change synchro-  
nously with the rising edge of the clock input (CP) even  
though only one output is enabled at the time.  
n FAST TTL outputs  
n TRI-STATE® outputs  
n Voltage compensated operating range −4.2V to −5.7V  
n Standard Microcircuit Drawing  
The cut-off state is designed to be more negative than a nor-  
mal ECL LOW level. This allows the output emitter-followers  
to turn off when the termination supply is −2.0V, presenting a  
high impedance to the data bus. This high impedance re-  
duces the termination power and prevents loss of low state  
noise margin when several loads share the bus.  
=
(SMD) 5962-9206601  
Connection Diagrams  
24-Pin DIP  
24-Pin Quad Cerpack  
DS100306-4  
DS100306-2  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
FAST® is a registered trademark of Fairchild Semiconductor.  
© 1999 National Semiconductor Corporation  
DS100306  
www.national.com  

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