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100324MW8 PDF预览

100324MW8

更新时间: 2023-01-02 23:23:41
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
9页 161K
描述
IC HEX TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, UUC, WAFER, Level Translator

100324MW8 数据手册

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August 1998  
100324  
Low Power Hex TTL-to-ECL Translator  
General Description  
Features  
n Pin/function compatible with 100124  
n Meets 100124 AC specifications  
n 50% power reduction of the 100124  
n Differential outputs  
The 100324 is a hex translator, designed to convert TTL  
logic levels to 100K ECL logic levels. The inputs are compat-  
ible with standard or Schottky TTL. A common Enable (E),  
when LOW, holds all inverting outputs HIGH and holds all  
true outputs LOW. The differential outputs allow each circuit  
to be used as an inverting/non-inverting translator, or as a  
differential line driver. The output levels are voltage compen-  
sated over the full −4.2V to −5.7V range.  
n 2000V ESD protection  
n −4.2V to −5.7V operating range  
n Standard Microcircuit Drawing  
(SMD) 5962-9153001  
When the circuit is used in the differential mode, the 100324,  
due to its high common mode rejection, overcomes voltage  
gradients between the TTL and ECL ground systems. The  
VEE and VTTL power may be applied in either order.  
The 100324 is pin and function compatible with the 100124  
with similar AC performance, but features power dissipation  
roughly half of the 100124 to ease system cooling require-  
ments.  
Logic Diagram  
Pin Names  
Description  
D0–D5  
E
Data Inputs  
Enable Input  
Data Outputs  
Complementary  
Data Outputs  
Q0–Q5  
Q0–Q5  
DS100313-4  
© 1998 National Semiconductor Corporation  
DS100313  
www.national.com  

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