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TFP401

更新时间: 2024-09-26 22:19:51
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德州仪器 - TI 接收机
页数 文件大小 规格书
19页 301K
描述
TI PanelBus DIGITAL RECEIVER

TFP401 数据手册

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TFP401, TFP401A  
TI PanelBus DIGITAL RECEIVER  
SLDS120B - MARCH 2000 – REVISED JUNE 2003  
Supports UXGA Resolution  
(Output Pixel Rates Up to 165 MHz)  
Reduced Power Consumption – 1.8 V Core  
Operation With 3.3 V I/Os and Supplies  
2
Digital Visual Interface (DVI) Specification  
Compliant  
Reduced Ground Bounce Using Time  
Staggered Pixel Outputs  
1
True-Color, 24 Bit/Pixel, 16.7M Colors at  
1 or 2-Pixels Per Clock  
Lowest Noise and Best Power Dissipation  
Using TI PowerPAD Packaging  
Laser Trimmed Internal Termination  
Resistors for Optimum Fixed Impedance  
Matching  
Advanced Technology Using TI 0.18-µm  
EPIC-5 CMOS Process  
TFP401A Incorporates HSYNC Jitter  
3
Skew Tolerant Up to One Pixel Clock Cycle  
4x Over-Sampling  
Immunity  
description  
The Texas Instruments TFP401 and TFP401A are TI PanelBus flat panel display products, part of a  
comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors  
and digital projectors, the TFP401/401A finds applications in any design requiring high-speed digital interface.  
The TFP401/401A supports display resolutions up to UXGA in 24-bit true color pixel format. The TFP401/401A  
offersdesignflexibilitytodriveoneortwopixelsperclock, supportsTFTorDSTNpanels, andprovidesanoption  
for time staggered pixel outputs for reduced ground bounce.  
PowerPAD advanced packaging technology results in best of class power dissipation, footprint, and ultra-low  
ground inductance.  
The TFP401/401A combines PanelBus circuit innovation with TI’s advanced 0.18-µm EPIC-5 CMOS  
process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low  
noise, high-speed digital interface solution.  
AVAILABLE OPTIONS  
PACKAGED DEVICE  
T
A
100-TQFP  
(PZP)  
TFP401PZP  
0°C to 70°C  
TFP401APZP  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
1. The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for  
high-speed digital connection to digital displays The TFP401 and TFP401A are compliant to the DVI Specification Rev. 1.0.  
2. The TFP401/401A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V  
supplies.  
3. The TFP401A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on  
the transmitted HSYNC signal.  
PanelBus, PowerPAD and EPIC-5 are trademarks of Texas Instruments.  
2
I C is a licensed bus protocol from Phillips Semiconductor, Inc.  
Copyright 2000–2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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