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TDA7460ND PDF预览

TDA7460ND

更新时间: 2024-11-15 22:36:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 消费电路商用集成电路光电二极管信息通信管理
页数 文件大小 规格书
31页 228K
描述
CAR RADIO SIGNAL PROCESSOR

TDA7460ND 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:ROHS COMPLIANT, SOP-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.8
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:12.8 mm
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:9 V认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Other Consumer ICs
最大压摆率:35 mA最大供电电压 (Vsup):10 V
最小供电电压 (Vsup):7.5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

TDA7460ND 数据手册

 浏览型号TDA7460ND的Datasheet PDF文件第2页浏览型号TDA7460ND的Datasheet PDF文件第3页浏览型号TDA7460ND的Datasheet PDF文件第4页浏览型号TDA7460ND的Datasheet PDF文件第5页浏览型号TDA7460ND的Datasheet PDF文件第6页浏览型号TDA7460ND的Datasheet PDF文件第7页 
TDA7460N  
CAR RADIO SIGNAL PROCESSOR  
DEVICE INCLUDES AUDIO PROCESSOR,  
STEREO DECODER, NOISEBLANKER AND  
MULTIPATH DETECTOR  
HIGH PERFORMANCE SIGNAL PROCES-  
SOR  
NO EXTERNAL COMPONENTS REQUIRED  
FULLY PROGRAMMABLE VIA I2C BUS  
LOW DISTORTION  
LOW NOISE  
SO20  
ORDERING NUMBER: TDA7460ND  
DESCRIPTION  
The TDA7460N is a high performance signal  
processor specifically designed for car radio ap-  
plications.  
nents or adjustments. This means that higher  
quality and reliability walks alongside an overall  
cost saving.  
The device includes a complete audioprocessor  
The CSP is fully programmable by I2C bus inter-  
face allowing to customize key device parameters  
and especiallyfilter characteristics.  
and  
a
stereo decoder with noiseblanker,  
stereoblend and all signal processing functions  
necessary for state-of-the-art as well as future car  
radio systems.  
The BICMOS process combined with the opti-  
mized signal processing assure low noise and  
low distortionperformances.  
Switched-capacitors design technique allows to  
obtain all these features without external compo-  
BLOCK DIAGRAM  
CDL CDG CDR  
SMUTE  
5
4
3
11  
17  
19  
16  
18  
OUT LR  
OUT LF  
OUT RR  
OUT RF  
OUT LR  
OUT LF  
OUT RR  
OUT RF  
8
MIXING  
STAGE  
SOFT  
MUTE  
AM  
LOUDNESS  
VOLUME  
TREBLE  
BASS  
1
2
CASS R  
CASS L  
INPUT  
MULTIPLEXER  
PHONE  
12  
13  
+
SCL  
SDA  
7
6
BEEP  
DIGITAL CONTROL  
I2C BUS  
AUTO ZERO  
PHONE  
(MPIN)  
PHONE GND  
(MPOUT)  
FM R  
FM L  
DEMODULATOR  
+ STEREO ADJUST  
+ STEREO BLEND  
HIGH  
CUT  
CONTROL  
PILOT  
CANCELLATION  
9
25KHz  
LP  
S & H  
80KHz  
LP  
MPX  
15  
D
PIL  
DET  
VS  
SUPPLY  
PLL  
MULTIPATH-  
DETECTOR  
NOISE  
BLANKER  
PULSE  
FORMER  
A
14  
20  
10  
D97AU629A  
GND CREF  
LEVEL  
June 2000  
1/31  

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