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TC7MP3245FTG PDF预览

TC7MP3245FTG

更新时间： 2024-11-29 04:00:27
品牌 Logo 应用领域
东芝 - TOSHIBA 总线驱动器总线收发器逻辑集成电路
页数 文件大小 规格书
22页 294K
描述
Low Voltage/Low Power 4-Bit 】 2 Dual Supply Bus Transceiver

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中文翻译

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TC7MP3245FTG 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：VQCCN, LCC24,.16SQ,20针数：24
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.81Is Samacsys：N
控制类型：COMMON CONTROL计数方向：BIDIRECTIONAL
系列：PJESD-30 代码：S-PQCC-N24
JESD-609代码：e2长度：3.8 mm
逻辑集成电路类型：BUS TRANSCEIVER最大I（ol）：0.003 A
位数：1功能数量：1
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：VQCCN
封装等效代码：LCC24,.16SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, VERY THIN PROFILE电源：1.2/2.5,1.8/3.3 V
Prop。Delay @ Nom-Sup：58 ns传播延迟（tpd）：10.3 ns
认证状态：Not Qualified座面最大高度：0.6 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：2.7 V
最小供电电压 (Vsup)：1.1 V标称供电电压 (Vsup)：1.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：TIN SILVER
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD翻译：N/A
宽度：3.8 mmBase Number Matches：1

TC7MP3245FTG 数据手册

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TC7MP3245FTG  
TOSHIBA Digital Integrated Circuit Silicon Monolithic  
TC7MP3245FTG  
Low Voltage/Low Power 4-Bit × 2 Dual Supply Bus Transceiver  
The TC7MP3245FTG is a dual supply, advanced high-speed  
CMOS 8-bit dual supply voltage interface bus transceiver fabricated  
with silicon gate CMOS technology.  
It is also designed with over voltage tolerant inputs and outputs up  
to 3.6 V.  
Designed for use as an interface between a 1.2-V, 1.5-V, 1.8-V, or  
2.5-V bus and a 1.8-V, 2.5-V or 3.6-V bus in mixed 1.2-V, 1.5-V,  
1.8-V or 2.5-V/1.8-V, 2.5-V or 3.6-V supply systems.  
The A-port interfaces with the 1.2-V, 1.5-V, 1.8-V or 2.5-V bus, the  
B-port with the 1.8-V, 2.5-V, 3.3-V bus.  
The direction of data transmission is determined by the level of the  
DIR input. The enable input ( OE ) can be used to disable the device  
so that the buses are effectively isolated.  
Weight: 0.03 g (typ.)  
All inputs are equipped with protection circuits against static discharge or transient excess voltage.  
Features  
•
Bidirectional interface between 1.2-V and 1.8-V, 1.2-V and 2.5-V, 1.2-V and 3.3-V, 1.5-V and 2.5-V, 1.5-V and 3.3-V,  
1.8-V and 2.5-V, 1.8-V and 3.3-V or 2.5-V and 3.3-V buses.  
•
High-speed operation : t = 6.8 ns (max) (V  
= 2.5 ± 0.2 V, V  
= 3.3 ± 0.3 V)  
pd  
CCA  
CCB  
t
t
t
t
t
t
t
= 8.9 ns (max) (V  
= 10.3 ns (max) (V  
= 1.8 ± 0.15 V, V  
= 3.3 ± 0.3 V)  
= 3.3 ± 0.3 V)  
= 3.3 ± 0.3 V)  
= 2.5 ± 0.2 V)  
= 2.5 ± 0.2 V)  
= 2.5 ± 0.2 V)  
= 1.5 ± 0.1 V)  
pd  
pd  
pd  
pd  
pd  
pd  
pd  
CCA  
CCB  
= 1.5 ± 0.1 V, V  
CCA  
CCB  
= 61 ns (max) (V  
= 1.2 ± 0.1 V, V  
CCA  
CCB  
= 9.5 ns (max) (V  
= 1.8 ± 0.15 V, V  
CCA  
CCB  
= 10.8 ns (max) (V  
= 1.5 ± 0.1 V, V  
CCA  
CCB  
= 60 ns (max) (V  
= 58 ns (max) (V  
= 1.2 ± 0.1 V, V  
= 1.2 ± 0.1 V, V  
CCA  
CCB  
CCB  
CCA  
•
Output current : I /I = ±12 mA (min) (V  
= 3.0 V)  
OH OL  
CC  
I
I
I
/I = ±9 mA (min) (V  
= 2.3 V)  
= 1.65 V)  
= 1.4 V)  
OH OL  
CC  
CC  
CC  
/I = ±3 mA (min) (V  
OH OL  
/I = ±1 mA (min) (V  
OH OL  
•
•
Latch-up performance: ±300 mA  
ESD performance: Machine model ≥ ±200 V  
Human body model ≥ ±2000 V  
Ultra-small package: VQON24  
•
•
Low current consumption : Using the new circuit significantly reduces current consumption when OE = “H”.  
Suitable for battery-driven applications such as PDAs and cellular phones.  
•
Floating A-bus and B-bus are permitted. (when OE = “H”)  
3.6-V tolerant function and power-down protection provided on all inputs and outputs.  
Note 1: Do not apply a signal to any bus pins when it is in the output mode. Damage may result.  
Note 2: When mounting VQON package, the type of recommended flux is RA or RMA.  
1
2007-10-19  
1234567...22

中文翻译

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