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TC74VHCV573FK PDF预览

TC74VHCV573FK

更新时间: 2024-11-06 12:23:03
品牌 Logo 应用领域
东芝 - TOSHIBA 锁存器
页数 文件大小 规格书
10页 201K
描述
Octal Schmitt D-Type Latch with 3-State Output

TC74VHCV573FK 数据手册

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TC74VHCV573FT/FK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHCV573FT,TC74VHCV573FK  
Octal Schmitt D-Type Latch with 3-State Output  
The TC74VHCV573 is an advanced high speed CMOS OCTAL  
LATCH with 3-STATE OUTPUT fabricated with silicon gate  
TC74VHCV573FT  
C2MOS technology.  
It achieves the high speed operation similar to equivalent Bipolar  
Schottky TTL while maintaining the CMOS low power  
dissipation.  
This 8-bit D-type latch is controlled by a latch enable input (LE)  
and an output enable input ( OE ).  
When the OE input is high, the eight outputs are in a high  
impedance state.  
Input pin have hysteresis between the positive-going and  
negative-going thresholds. Thus the TC74VHCV573 is capable of  
squaring up transitions of slowly changing input signals and  
provides an improved noise immunity.  
TC74VHCV573FK  
Input protection and output circuit ensure that 0 to 5.5 V can be  
applied to the input and output (Note) pins without regard to the  
supply voltage. These structure prevents device destruction due  
to mismatched supply and input/output voltages such as battery  
back up, etc.  
Note:  
Output in off-state.  
Weight  
TSSOP20-P-0044-0.65A  
VSSOP20-P-0030-0.50  
: 0.08 g ( typ.)  
: 0.03 g ( typ.)  
Features  
High speed: t = 5.0 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 2 μA (max) at Ta = 25°C  
CC  
Wide operating voltage range: V  
= 1.8 V to 5.5 V  
CC (opr)  
Ouput current: |I |/I  
= 16 mA (min) (V  
= 4.5 V)  
OH OL  
CC  
Available in TSSOP and VSSOP (US)  
Power-down protection provided on all inputs and outputs  
Pin and function compatible with the 74 series  
(74AC/VHC/HC/F/ALS/LS etc.) 573 type  
1
2010-07-09  

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