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TC74VHCT244AFK PDF预览

TC74VHCT244AFK

更新时间: 2024-11-04 05:15:55
品牌 Logo 应用领域
东芝 - TOSHIBA 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 221K
描述
Octal Bus Buffer

TC74VHCT244AFK 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SSOP
包装说明:VSSOP, TSSOP20,.16,20针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.45Is Samacsys:N
控制类型:ENABLE LOW系列:AHCT/VHCT
JESD-30 代码:R-PDSO-G20长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装等效代码:TSSOP20,.16,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:9.5 ns传播延迟(tpd):9.5 ns
认证状态:Not Qualified座面最大高度:1 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3 mm
Base Number Matches:1

TC74VHCT244AFK 数据手册

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TC74VHCT240,244AF/AFT/AFK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHCT240AF,TC74VHCT240AFT,TC74VHCT240AFK  
TC74VHCT244AF,TC74VHCT244AFT,TC74VHCT244AFK  
Octal Bus Buffer  
TC74VHCT240AF/AFT/AFK  
Inverted, 3-State Outputs  
TC74VHCT244AF/AFT/AFK  
Non-Inverted, 3-State Outputs  
TC74VHCT240AF, TC74VHCT244AF  
The TC74VHCT240A and 244A are advanced high speed  
CMOS OCTAL BUS BUFFERs fabricated with silicon gate  
C2MOS technology. They achieve the high speed operation  
similar to equivalent Bipolar Schottky TTL while maintaining  
the CMOS low power dissipation.  
The TC74VHCT240A is an inverting 3-state buffer having two  
active-low output enables. The TC74VHCT244A is a  
non-inverting 3-state buffer, and has two active-low output  
enables.  
These devices are designed to be used with 3-state memory  
address drivers, etc.  
The input voltage are compatible with TTL output voltage.  
These devices may be used as a level converter for interfacing  
3.3 V to 5 V system.  
TC74VHCT240AFT, TC74VHCT244AFT  
TC74VHCT240AFK, TC74VHCT244AFK  
Weight  
Input protection and output circuit ensure that 0 to 5.5 V can  
be applied to the input and output (Note) pins without regard to  
the supply voltage. These structure prevents device destruction  
due to mismatched supply and input/output voltages such as  
battery back up, hot board insertion, etc.  
Note:  
Output in off-state  
Features  
High speed: t = 6.1 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
SOP20-P-300-1.27A  
: 0.22 g (typ.)  
Compatible with TTL outputs: V = 0.8 V (max)  
TSSOP20-P-0044-0.65A  
VSSOP20-P-0030-0.50  
: 0.08 g (typ.)  
: 0.03 g (typ.)  
IL  
V
IH  
= 2.0 V (min)  
Power down protection is provided on all inputs and outputs  
Balanced propagation delays: t  
t
pHL  
pLH  
Low noise: V  
= 1.0 V (max)  
OLP  
Pin and function compatible with the 74 series  
(74AC/HC/F/ALS/LS etc.) 240/244 type.  
1
2007-10-01  

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