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TC74VHC9164FK PDF预览

TC74VHC9164FK

更新时间: 2024-11-12 14:58:11
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
10页 654K
描述
8-bit Shift Register, US16

TC74VHC9164FK 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SOIC包装说明:VSSOP,
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.76
计数方向:RIGHT系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G16长度:4 mm
逻辑集成电路类型:PARALLEL IN SERIAL OUT位数:8
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:VSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):21.6 ns
座面最大高度:1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3 mm最小 fmax:90 MHz
Base Number Matches:1

TC74VHC9164FK 数据手册

 浏览型号TC74VHC9164FK的Datasheet PDF文件第2页浏览型号TC74VHC9164FK的Datasheet PDF文件第3页浏览型号TC74VHC9164FK的Datasheet PDF文件第4页浏览型号TC74VHC9164FK的Datasheet PDF文件第5页浏览型号TC74VHC9164FK的Datasheet PDF文件第6页浏览型号TC74VHC9164FK的Datasheet PDF文件第7页 
TC74VHC9164FK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHC9164FK  
8-Bit Shift Register (Parallel-IN/ Serial-OUT, Serial -IN/ Parallel -OUT)  
The TC74VHC9164 is an ultra-high-speed 8-Bit Shift Register  
fabricated using silicon-gate CMOS technology. The  
TC74VHC9164 combines low power consumption of CMOS with  
Schottky TTL speeds.  
TC74VHC9164FK  
The TC74VHC9164 has parallel data inputs/outputs, a serial  
input and a serial output. It converts parallel data into serial data  
or vice versa.  
When P/S CONT is Low, Q/D1 to Q/D8 are configured as  
parallel data outputs. At this time, the SI input is serially loaded on  
the rising edges of CK and unloaded from the Q/D1 to Q/D8  
outputs in parallel. When  
asynchronously reset, irrespective of the CK state.  
When P/S CONT is High, Q/D1 to Q/D8 are configured as  
input is Low, all flip-flops are  
CLR/LOAD  
Weight  
VSSOP16-P-0030-0.50  
: 0.02 g (typ.)  
parallel data inputs. At this time, when  
is Low, Q/D1 to  
CLR/LOAD  
Q/D8 latch data in parallel asynchronously from the CK input.  
All the inputs have hysteresis between the positive-going and  
negative-going thresholds. Thus the TC74VHC9164 is capable of  
squaring up transitions of slowly changing input signals and  
provides an improved noise immunity.  
Additionally, all the inputs have a newly developed protection  
circuit without a diode returned to V . This enables the inputs  
CC  
to be tolerant of up to 5.5 volts even when power supply is down.  
The input power-down protection capability makes the  
TC74VHC9164 ideal for a wide range of applications, such as  
interfacing between different voltages, voltage translation from 5  
V to 3 V and battery back-up circuits.  
Features  
High speed: f  
max  
149 MHz (typ.) at V  
5 V  
CC  
Low power dissipation: I  
4 A (max) at Ta 25°C  
CC  
Power down protection is provided on all inputs.  
Balanced propagation delays: t  

t  
  
pLH pHL  
Wide operating voltage range: V  
(opr) 2 to 5.5 V  
CC  
Start of commercial production  
2011-03  
© 2018  
2018-06-22  
1
Toshiba Electronic Devices & Storage Corporation  

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