TC74VHC9164FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC9164FK
8-Bit Shift Register (Parallel-IN/ Serial-OUT, Serial -IN/ Parallel -OUT)
The TC74VHC9164 is an ultra-high-speed 8-Bit Shift Register
fabricated using silicon-gate CMOS technology. The
TC74VHC9164 combines low power consumption of CMOS with
Schottky TTL speeds.
TC74VHC9164FK
The TC74VHC9164 has parallel data inputs/outputs, a serial
input and a serial output. It converts parallel data into serial data
or vice versa.
When P/S CONT is Low, Q/D1 to Q/D8 are configured as
parallel data outputs. At this time, the SI input is serially loaded on
the rising edges of CK and unloaded from the Q/D1 to Q/D8
outputs in parallel. When
asynchronously reset, irrespective of the CK state.
When P/S CONT is High, Q/D1 to Q/D8 are configured as
input is Low, all flip-flops are
CLR/LOAD
Weight
VSSOP16-P-0030-0.50
: 0.02 g (typ.)
parallel data inputs. At this time, when
is Low, Q/D1 to
CLR/LOAD
Q/D8 latch data in parallel asynchronously from the CK input.
All the inputs have hysteresis between the positive-going and
negative-going thresholds. Thus the TC74VHC9164 is capable of
squaring up transitions of slowly changing input signals and
provides an improved noise immunity.
Additionally, all the inputs have a newly developed protection
circuit without a diode returned to V . This enables the inputs
CC
to be tolerant of up to 5.5 volts even when power supply is down.
The input power-down protection capability makes the
TC74VHC9164 ideal for a wide range of applications, such as
interfacing between different voltages, voltage translation from 5
V to 3 V and battery back-up circuits.
Features
High speed: f
max
149 MHz (typ.) at V
5 V
CC
Low power dissipation: I
4 A (max) at Ta 25°C
CC
Power down protection is provided on all inputs.
Balanced propagation delays: t
pLH pHL
Wide operating voltage range: V
(opr) 2 to 5.5 V
CC
Start of commercial production
2011-03
© 2018
2018-06-22
1
Toshiba Electronic Devices & Storage Corporation