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TC74VHC125FK PDF预览

TC74VHC125FK

更新时间: 2024-11-04 05:15:59
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
11页 259K
描述
Quad Bus Buffer

TC74VHC125FK 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SSOP
包装说明:VSSOP, TSSOP14,.16,20针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.55控制类型:ENABLE LOW
系列:AHC/VHCJESD-30 代码:R-PDSO-G14
长度:4 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装等效代码:TSSOP14,.16,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/5.5 V
Prop。Delay @ Nom-Sup:8.5 ns传播延迟(tpd):13 ns
认证状态:Not Qualified座面最大高度:1 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3 mm
Base Number Matches:1

TC74VHC125FK 数据手册

 浏览型号TC74VHC125FK的Datasheet PDF文件第2页浏览型号TC74VHC125FK的Datasheet PDF文件第3页浏览型号TC74VHC125FK的Datasheet PDF文件第4页浏览型号TC74VHC125FK的Datasheet PDF文件第5页浏览型号TC74VHC125FK的Datasheet PDF文件第6页浏览型号TC74VHC125FK的Datasheet PDF文件第7页 
TC74VHC125,126F/FN/FT/FK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHC125F,TC74VHC125FN,TC74VHC125FT,TC74VHC125FK  
TC74VHC126F,TC74VHC126FN,TC74VHC126FT,TC74VHC126FK  
TC74VHC125F/FN/FT/FK Quad Bus Buffer  
TC74VHC126F/FN/FT/FK Quad Bus Buffer  
Note: xxxFN (JEDEC SOP) is not available in  
Japan.  
TC74VHC125F, TC74VHC126F  
The TC74VHC125/126 are high speed CMOS QUAD BUS  
BUFFERs fabricated with silicon gate C2MOS technology.  
They achieve the high speed operation similar to equivalent  
Bipolar Shottky TTL while maintaining the CMOS low power  
dissipation.  
The TC74VHC125 requires the 3-state control input G to be  
set high to place the output into the high impedance state,  
whereas the TC74VHC126 requires the control input G to be set  
low to place the output into high impedance.  
TC74VHC125FN, TC74VHC126FN  
An input protection circuit ensures that 0 to 5.5 V can be  
applied to the input pins without regard to the supply voltage.  
This device can be used to interface 5 V to 3 V systems and two  
supply systems such as battery back up.  
This circuit prevents device destruction due to mismatched  
supply and input voltages.  
Features  
High speed: t = 3.8 ns (typ.) at V  
= 5 V  
pd  
CC  
TC74VHC125FT, TC74VHC126FT  
TC74VHC125FK, TC74VHC126FK  
Weight  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Power down protection is provided on all inputs.  
Balanced propagation delays: t  
t
pHL  
pLH  
Wide operating voltage range: V  
= 2 to 5.5 V  
CC (opr)  
Low noise: V  
= 0.8 V (max)  
OLP  
Pin and function compatible with 74ALS125/126  
SOP14-P-300-1.27A  
SOL14-P-150-1.27  
: 0.18 g (typ.)  
: 0.12 g (typ.)  
TSSOP14-P-0044-0.65A : 0.06 g (typ.)  
VSSOP14-P-0030-0.50  
: 0.02 g (typ.)  
1
2007-10-01  

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